參數(shù)資料
型號(hào): UPD444016LG5-A10-7JF
廠商: NEC Corp.
英文描述: 4M-BIT CMOS FAST SRAM 256K-WORD BY 16-BIT
中文描述: 4分位CMOS快速靜態(tài)存儲(chǔ)器256K字由16位
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 102K
代理商: UPD444016LG5-A10-7JF
11
μ
PD444016L
Data Sheet M14431EJ3V0DS
Write Cycle Timing Chart 3 (/LB, /UB Controlled)
t
WC
t
AS
t
BW
t
WR
t
DW
t
DH
Address (Input)
/LB, /UB (Input)
/WE (Input)
/CS (Input)
High impedance
Data in
High impedance
t
CW
I/O (Input)
t
AW
t
WP
Cautions 1. /CS or /WE should be fixed to high level during address transition.
2. Do not input data to the I/O pins while they are in the output state.
Remark
Write operation is done during the overlap time of a low level /CS, a low level /WE and a low level /LB
(or low level /UB).
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