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參數(shù)資料
| 型號： | UPD17P207GF-001-3B9 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 8/34頁 |
| 文件大?。?/td> | 311K |
| 代理商： | UPD17P207GF-001-3B9 |
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PD17P207
14
2.2
PROGRAM MEMORY WRITE PROCEDURE
The program memory write procedure is as follows. High-speed program memory write is possible.
(1) Ground the unused pins through pull-down resistors. The CLK pin must be low.
(2) Supply 5 V to the VDD pin. The VPP pin must be low.
(3) After waiting for 10
s, supply 5 V to the VPP pin.
(4) Operate the MD0 to MD3 pins to set program memory address 0 clear mode.
(5) Supply 6 V to the VDD pin and 12.5 V to the VPP pin.
(6) Set program inhibit mode.
(7) Write data in 1-millisecond write mode.
(8) Set program inhibit mode.
(9) Set verify mode. If data has been written connectly, proceed to step (10). If data has not yet been written,
repeat steps (7) to (9).
(10) Write additional data for (the number of times data was written (X) in steps (7) to (9)) times
1 milliseconds.
(11) Set program inhibit mode.
(12) Supply a pulse to the CLK pin four times to update the program memory address by 1.
(13) Repeat steps (7) to (12) to the last address.
(14) Set program memory address 0 clear mode.
(15) Change the voltages of VDD and VPP pins to 5 V.
(16) Turn off the power supply.
Steps (2) to (12) are illustrated below.
Reset
VPP
VDD
GND
VDD+1
VDD
GND
VPP
VDD
Data input
Data
output
Data input
Write
Verify
Additional
data write
Address
increment
X-time repetition
D -D
0
7
MD0
MD1
MD2
MD3
CLK
Hi-z
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