45
μ
PD17717, 17718, 17719
5.3.2 Function of address register
The address register specifies a program memory address when the table reference instruction (“MOVT DBF,
@AR”), stack manipulation instruction (“PUSH AR”, “POP AR”), indirect branch instruction (“BR @AR”), or
indirect subroutine call instruction (“CALL @AR”) is executed.
A dedicated instruction (“INC AR”) is available that can increment the contents of the address instruction by
one.
The following paragraphs (1) through (5) describe the operation of the address register when the respective
instructions are executed.
(1) Table reference instruction (“MOVT DBF, @AR”)
When the table reference instruction is executed, the constant data (16 bits) of a program memory
address specified by the contents of the address register are read to the data buffer.
The constant data that can be specified by the address register is stored to address 0000H to 2FFFH
in the case of the
μ
PD17717, and address 0000H to 3FFFH in the case of the
μ
PD17718 and 17719.
(2) Stack manipulation instruction (“PUSH AR”, “POP AR”)
When the “PUSH AR” instruction is executed, the value of the stack pointer is decremented by one, and
the contents of the address register (AR) are transferred to an address stack register specified by the
stack pointer whose value has been decremented by one.
When the “POP AR” instruction is executed, the contents of an address stack register specified by the
stack pointer are transferred to the address register, and the value of the stack pointer is incremented
by one.
(3) Indirect branch instruction (“BR @AR”)
When this instruction is executed, the program branches to a program memory address specified by the
contents of the address register.
The branch address that can be specified by the address register is 0000H to 2FFFH in the case of the
μ
PD17717, and 0000H to 3FFFH in the case of the
μ
PD17718 and 17719.
(4) Indirect subroutine call instruction (“CALL @AR”)
The subroutine at a program memory address specified by the contents of the address register can be
called.
The first address of the subroutine that can be specified by the address register is 0000H to 2FFFH in
the case of the
μ
PD17717, and 0000H to 3FFFH in the case of the
μ
PD17718 and 17719.
(5) Address register increment instruction (“INC AR”)
This instruction increments the contents of the address register by one.
5.3.3 Address register and data buffer
The address register can transfer data as part of the peripheral hardware via the data buffer.
For details, refer to
9. DATA BUFFER (DBF)
.
5.3.4 Cautions on Using Address Register
Because the address register is configured in 16 bits, it can specify an address up to FFFFH.
However, the program memory exists at addresses 0000H through 2FFFH in the case of the
μ
PD17717 and
addresses 0000H through 3FFFH in the case of the
μ
PD17718 and 17719.
Therefore, the maximum value that can be set to the address register of the
μ
PD17717 is address 2FFFH.
In the case of the
μ
PD17718 and 17719, it is address 3FFFH.