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參數(shù)資料
| 型號： | UCC2857 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Isolated Boost PFC Preregulator Controller |
| 中文描述： | 隔離升壓PFC前置穩(wěn)壓器控制器 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 127K |
| 代理商： | UCC2857 |
8
UCC1857
UCC2857
UCC3857
put voltage changes, but the V
RMS
value fed into the
multiplier does not change. The voltage error amplifier
compensates for this by changing its output to maintain
the required multiplier output current. When the output of
the ADC changes, there is a jump in the output of the er-
ror amplifier. This has minimal impact on the overall con-
verter operation.
Another key consideration with the RMS voltage scheme
is that it relies on the zero-crossing of the Iac signal to be
effective. At very light loads and high line conditions, the
rectified AC does not quite reach zero if a large capacitor
is being used for filtering on the rectified side of the
bridge. In such instances, the feedforward effect does
not take place and the controller functionality is compro-
mised. For UCC3857, the I
AC
current should go below
10 A for the zero crossing detection to take place. It is
recommended that the capacitor value be kept low
enough for light load operation or that the alternative
scheme shown in Fig. 4 be used for I
AC
sense.
Gate Drive Considerations
The gate drive circuits in UCC3857 are designed for high
speed driving of the power switches. Each drive circuit
consists of low impedance pull-up and pull-down DMOS
output stages. The UCC3857 provides separate supply
and ground pins (VD and PGND) for the driver stages.
These pins allow better local bypassing of the driver cir-
cuits. VD can also be used to ensure that the SOA limits
of the output stages are not violated when driving high
peak current levels. For this, VD can be kept as low as
possible (e.g. 10V) while VIN can go higher to handle the
UVLO requirements.
Current Amplifier Set-up
Once the multiplier is set-up by choosing the V
RMS
range, the current amplifier components can be de-
signed. The maximum multiplier output is at low line, full
load conditions. The inductor peak current also occurs at
the same point. The multiplier terminating resistor can be
determined using equation 4.
A
D
MULTI
DAC
6 BIT
WORD
REGISTER
A
B
C
A
B
C
VAO
IAC
R
AC
1
2
(X
2
)
C
CRMS
CRMS
Figure 3. Novel RMS voltage generation scheme.
APPLICATION INFORMATION (cont.)
1
IAC
UCC3857
R
AC
BRIDGE
RECTIFIER
AC LINE
Figure 4. Alternative implementation for sensing I
AC
.
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