
7
UC1870 -1/ -2
UC2870 -1/ -2
UC3870 -1/ -2
gle external capacitor connected between CT and GND,
and is capable of switching frequencies up to 300kHz.
The UC3870 can be synchronized to an external clock
by capacitively coupling the signal to the junction of the
capacitor at CT and a low value resistor tied to GND. Re-
fer to Application Note U-111.
The PWM drive signal is applied to the complementary
output driver stages. Since the high side switch is an
N–channel MOSFET, a means for driving its gate above
VCC is required. This is accomplished via the internal
11V (UC3870-2)/7.5V (UC3870-1) regulator and an ex-
ternal capacitor (C
BST
). C
BST
is charged through an ex-
ternal diode to VCC or CAP when the low side MOSFET
is on. The charging level on C
BST
is internally regulated
to 11V or 7.5V minus an external diode drop by the
UC3870 as long as VCC is above 11V. When the low
side MOSFET turns off, C
BST
is applied across the gate
to the source of the upper MOSFET allowing it to begin
turn-on. As the upper MOSFET turns on, it lifts or boot-
straps the low end of C
BST
, along with its source. Shortly
thereafter, the source voltage level is reduced by
RDS(on) · I
LOAD
below VCC. When VCC < 10V, V
GS
for
the high side MOSFET is approximately equal to VCC. If
VCC < 8V, logic level MOSFETs are recommended. In
these applications, CAP should be shorted to VCC and
an external Schottky diode is connected between
CAP/VCC and BOOT. For low battery applications, a syn-
chronous regulator must be capable of LDO or 100%
duty cycle operation. The UC3870 includes circuitry to
insure that this mode of operation is possible even
though it uses a bootstrapped drive technique for the
high side MOSFET. During commanded 100% duty cycle
operation, the UC3870 monitors the V
GS
drive signal ap-
plied to the high side MOSFET, and automatically pro-
vides complementary pulses to refresh the bootstrap
capacitor when this voltage falls below a set threshold. In
this way, near 100% duty cycle operation is possible,
with effective duty cycle dependent only upon the value
of C
BST
.
High efficiency is obtained primarily by the low side
MOSFET which replaces the Schottky diode in the stan-
dard buck configuration. Its low R
DS(ON)
produces a
much lower voltage drop than a low VF Schottky diode.
As output voltages get lower, these improvements be-
come more evident.
Another efficiency consideration is the the possibility of
reverse current in the output inductor. For a non-
synchronous regulator this isn’t a problem since the di-
ode will block reverse current, allowing discontinuous in-
ductor current operation at light loads. Since the
synchronous regulator replaces the diode with a switch,
reverse current can and will flow if the low side switch is
on when the inductor is depleted. The UC3870 includes
circuitry to prevent reverse current from flowing in the in-
Figure 1. Typical Application: UC3870-1, -2 Pentium Pro Power Converter
APPLICATION INFORMATION (continued)
UDG-96159