IOLT D Output low c" />
參數(shù)資料
型號(hào): TWR-S08PT60
廠商: Freescale Semiconductor
文件頁數(shù): 36/37頁
文件大?。?/td> 0K
描述: TOWER SYSTEM MODULE S08PT60
標(biāo)準(zhǔn)包裝: 1
系列: S08
類型: MCU
適用于相關(guān)產(chǎn)品: Freescale 電源塔系統(tǒng)
所含物品: 板,線纜,DVD
Table 2. DC characteristics (continued)
Symbol
C
Descriptions
Min
Typical1
Max
Unit
IOLT
D
Output low
current
Max total IOL for all
ports
5 V
100
mA
3 V
60
VIH
P
Input high
voltage
All digital inputs
VDD>4.1V
0.70 × VDD
V
VDD>2.7V
0.85 × VDD
VIL
P
Input low
voltage
All digital inputs
VDD>4.1V
0.35 × VDD
V
VDD>2.7V
0.30 × VDD
Vhys
C
Input
hysteresis
All digital inputs
0.06 × VDD
mV
|IIn|
P
Input leakage
current
All input only pins
(per pin)
VIN = VDD
or VSS
0.1
1
A
|IOZ|
P
Hi-Z (off-
state)
leakage
current
All input/output (per
pin)
VIN = VDD
or VSS
0.1
1
A
|IOZTOT|
C
Total leakage
combined for
all inputs and
Hi-Z pins
All input only and I/O
VIN = VDD
or VSS
2
A
RPU
P
Pullup
resistors
All digital inputs,
when enabled (all I/O
pins other than
PTA5/IRQ/TCLK/
RESET
17.5
52.5
k
RPU3
P
Pullup
resistors
PTA5/IRQ/TCLK/
RESET
17.5
52.5
k
IIC
D
DC injection
current4, 5, 6
Single pin limit
VIN < VSS,
VIN > VDD
-0.2
0.2
mA
Total MCU limit,
includes sum of all
stressed pins
-5
5
CIn
C
Input capacitance, all pins
8
pF
VRAM
C
RAM retention voltage
2.0
V
1. Typical values are measured at 25 °C. Characterized, not tested.
2. Only PTB4, PTB5, PTD0, PTD1, PTE0, PTE1, PTH0, and PTH1 support ultra high current output.
3. The specified resistor value is the actual value internal to the device. The pullup value may appear higher when measured
externally on the pin.
4. All functional non-supply pins, except for PTA5, are internally clamped to VSS and VDD.
5. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the large one.
6. Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If the positive injection current (VIn > VDD) is higher than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure that external VDD load will shunt current higher than
maximum injection current when the MCU is not consuming power, such as no system clock is present, or clock rate is
very low (which would reduce overall power consumption).
Nonswitching electrical specifications
MC9S08PT60 Series Data Sheet, Rev. 3, 4/2012.
8
Freescale Semiconductor, Inc.
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