參數(shù)資料
型號(hào): TWR-MCF51CN
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 22/48頁(yè)
文件大?。?/td> 0K
描述: KIT TOWER BOARD
其它有關(guān)文件: TWR-MCF51CN Schematic
產(chǎn)品培訓(xùn)模塊: MCF51CN Family - Ultimate Ethernet Solutions
Tower System
特色產(chǎn)品: The Tower System
標(biāo)準(zhǔn)包裝: 1
系列: ColdFire®, Flexis™
類(lèi)型: MCU
適用于相關(guān)產(chǎn)品: Freescale 電源塔系統(tǒng),MCF51CN128
所含物品:
產(chǎn)品目錄頁(yè)面: 734 (CN2011-ZH PDF)
配用: TWR-ELEV-ND - TOWER ELEVATOR BOARDS HARDWARE
相關(guān)產(chǎn)品: MCF51CN128CLH-ND - IC MCU 32BIT 128K FLASH 64-LQFP
MCF51CN128CGT-ND - IC MCU 32BIT 128K FLASH 48-QFN
Electrical Characteristics
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
Freescale Semiconductor
29
3.12.3
SPI Timing
Table 19 and Figure 23 through Figure 26 describe the timing requirements for the SPI system.
Table 19. SPI Timing
No.
C
Function
Symbol
Min
Max
Unit
—D
Operating frequency
Master
Slave
fop
fBus/2048
0
fBus/2
fBus/4
Hz
1D
SPSCK period
Master
Slave
tSPSCK
2
4
2048
tcyc
2D
Enable lead time
Master
Slave
tLead
1
/2
1
tSPSCK
tcyc
3D
Enable lag time
Master
Slave
tLag
1
/2
1
tSPSCK
tcyc
4D
Clock (SPSCK) high or low time
Master
Slave
tWSPSCK
tcyc – 30
1024 tcyc
ns
5D
Data setup time (inputs)
Master
Slave
tSU
15
ns
6D
Data hold time (inputs)
Master
Slave
tHI
0
25
ns
7
D
Slave access time
ta
—1
tcyc
8
D
Slave MISO disable time
tdis
—1
tcyc
9D
Data valid (after SPSCK edge)
Master
Slave
tv
25
ns
10
D
Data hold time (outputs)
Master
Slave
tHO
0
ns
11
D
Rise time
Input
Output
tRI
tRO
tcyc – 25
25
ns
12
D
Fall time
Input
Output
tFI
tFO
tcyc – 25
25
ns
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