參數(shù)資料
型號(hào): TWR-MCF51CN
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 13/48頁(yè)
文件大小: 0K
描述: KIT TOWER BOARD
其它有關(guān)文件: TWR-MCF51CN Schematic
產(chǎn)品培訓(xùn)模塊: MCF51CN Family - Ultimate Ethernet Solutions
Tower System
特色產(chǎn)品: The Tower System
標(biāo)準(zhǔn)包裝: 1
系列: ColdFire®, Flexis™
類(lèi)型: MCU
適用于相關(guān)產(chǎn)品: Freescale 電源塔系統(tǒng),MCF51CN128
所含物品:
產(chǎn)品目錄頁(yè)面: 734 (CN2011-ZH PDF)
配用: TWR-ELEV-ND - TOWER ELEVATOR BOARDS HARDWARE
相關(guān)產(chǎn)品: MCF51CN128CLH-ND - IC MCU 32BIT 128K FLASH 64-LQFP
MCF51CN128CGT-ND - IC MCU 32BIT 128K FLASH 48-QFN
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
20
3.8
External Oscillator (XOSC) Characteristics
Reference Figure 11 and Figure 12 for crystal or resonator circuits.
Table 10. XOSC and ICS Specifications (Temperature Range = –40 to 85
°C Ambient)
Num
C
Characteristic
Symbol
Min
Typ1
1 Data in Typical column was characterized at 3.3 V, 25
°C or is typical recommended value.
Max
Unit
1
C
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
High range (RANGE = 1), high gain (HGO = 1)
High range (RANGE = 1), low power (HGO = 0)
flo
fhi
32
1
38.4
25
8
kHz
MHz
2
D
Load capacitors
Low range (RANGE=0), low power (HGO=0)
Other oscillator settings
C1,C2
See Note2
See Note3
2 Load capacitors (C
1,C2), feedback resistor (RF) and series resistor (RS) are incorporated internally when RANGE=HGO=0.
3 See crystal or resonator manufacturer’s recommendation.
3
D
Feedback resistor
Low range, low power (RANGE=0, HGO=0)2
Low range, High Gain (RANGE=0, HGO=1)
High range (RANGE=1, HGO=X)
RF
10
1
M
Ω
4D
Series resistor —
Low range, low power (RANGE = 0, HGO = 0)2
Low range, high gain (RANGE = 0, HGO = 1)
High range, low power (RANGE = 1, HGO = 0)
High range, high gain (RANGE = 1, HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
RS
0
100
0
0
10
20
Ω
ΚΩ
5C
Crystal start-up time 4
Low range, low power
Low range, high power
High range, low power
High range, high power
4 Proper PC board layout procedures must be followed to achieve specifications.
t
CSTL
t
CSTH
200
400
5
15
ms
6
D
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
External with FLL / PLL enabled (FEE / PEE)
External with bypass (FBE.FBELP,PBE, PBELP)
fextal
0.03125
0
50.33
MHz
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