![](http://datasheet.mmic.net.cn/390000/TVP3409-170_datasheet_16839170/TVP3409-170_23.png)
2–11
When RESET goes inactive, the RAMDAC loads each internal register with 0x00 unless otherwise noted.
The internal registers can be written through the MPU port even though the RAMDAC is not being clocked.
The internal pixel color RAM cannot be written unless the RAMDAC is clocked. The RAMDAC resets as
follows:
1.
2.
3.
4.
5.
The crystal oscillator is enabled.
The 6-bit DACs (VGA, SVGA) are reset.
The device is configured in 8-bit pseudocolor mode.
The frequency select terminals FS(1,0) determine the frequencies of both synthesizer A and B.
Synthesizer A runs at one of four preprogrammed frequencies (25.057, 28.189, 50.114, and
75.170 MHz) until register sets AC0–AC2 or AD0–AD2 are changed and selected.
Synthesizer B runs at one of four preprogrammed frequencies (29.979, 40.091, 50.114, and
59.957 MHz) until register sets BC0–BC2 or BD0–BD2 are changed and selected.
6.
2.4
The RAMDAC can be configured by programming the internal registers. To program all of the internal
registers, the device needs to have indexed addressing enabled. Indexed addressing is enabled by setting
bit CR0(0) = 1. Bit CR0(0) is set to 1 using an addressing mode available through the RMR. Using the RMR
to address internal registers allows backward compatibily with only four hardware addressable registers.
The following sequence of steps using DOS debug allows the indexed addressing mode to be enabled.
Indexed addressing mode can also be accomplished easily in a programming language such as C.
Programming From Reset
1.
Read the current state of command register 0 (CR0) with the RMR.
–o 3C8 00
Write to port 3C8 (WMA) with the value 0x00
Resets backdoor state machine
–i 3C6
Read port 3C6 (RMR)
Contents of the RMR
–i 3C6
Contents of the RMR
–i 3C6
Contents of the RMR
–i 3C6
Contents of the RMR
–i 3C6
Contents of the command register 0 (CR0)
2.
Enable indexed programming by setting CR0(0) = 1.
–o 3C8 00
Reset backdoor state machine
–i 3C6
Contents of the RMR
–i 3C6
Contents of the RMR
–i 3C6
Contents of the RMR
–i 3C6
Contents of the RMR
–o 3C6 xxxx xxx1 (binary) Set CR0(0) =1
3.
Indexed programming is now enabled.
3C8 is the address port
3C6 is the data port
4.
To exit indexed programming, set CR0(0) = 0.
–o 3C8 01
Select CR0
–i 3C6
Read CR0
–o 3C6 xxxx xxx0 (binary) Reset bit 0, leave other bits programmed as they are.