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參數(shù)資料
| 型號： | TVP3025-135 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| 中文描述： | 視頻接口盒（三鎖相環(huán)，視頻接口調(diào)色器） |
| 文件頁數(shù)： | 42/99頁 |
| 文件大?。?/td> | 663K |
| 代理商： | TVP3025-135 |
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2.3.9
On-Chip Cursor
The TVP3025 has an on-chip two-color 64 x 64 pixel user-definable cursor. The cursor operation defaults
to the XGA standard, but X-windows compatibility is also available (see Section 2.3.9.2). In addition to the
64
×
64 sprite cursor, the device also supports a two-color crosshair cursor. The cursors only operate in
noninterlaced applications.
The pattern for the 64
×
64 cursor is provided by the cursor RAM, which may be accessed by the MPU at
any time. Cursor positioning is performed via the cursor-position (x,y) registers and the sprite-origin (x,y)
registers (see register bit definitions in Sections 2.3.18.4 and 2.3.18.5). Positions x and y are defined in the
TVP3025 increasing from left to right and from top to bottom, respectively, as seen on the display screen.
The cursor position (x,y) is relative to the first pixel displayed. In other words, the very first pixel displayed
is located at position (0,0), and the last pixel displayed for a 1024
×
768 system is located at position
(1023, 767).
On-chip cursor control is performed by the cursor-control register in the indirect register map (06 hex). Bits
0 and 1 control the width of the crosshair (1, 3, 5, or 7 pixels). Bit 2 enables/disables the crosshair cursor,
and bit 3 controls the crosshair-cursor color. Bit 4 specifies either XGA or X-window mode for the sprite
cursor. Bit 5 controls the color at the intersection of the sprite and crosshair cursors, and bit 6
enables/disables the sprite cursor. See the cursor-control register bit definitions in Section 2.3.18.3 for more
details.
2.3.9.1
Cursor RAM
The 64
×
64
×
2 cursor RAM is used to define the pixel pattern within the 64
×
64 pixel cursor window. It is
not initialized and may be written to or read by the MPU at any time. The cursor-RAM address zero is at the
top left corner of the RAM as shown in Figure 2–10.
The cursor RAM is written to by loading a number into the cursor RAM MS address and cursor RAM LS
address. Address registers 09 and 08 (hex) of the index register indicate the location of the first group of
four cursor pixels to be updated (two bits per pixel implies four pixels per byte). Then the first four pixels are
written to the cursor-RAM data register [0A (hex) of the index register]. This stores the cursor pixel data in
the cursor RAM and automatically increments the cursor-RAM address register. A second write to the
cursor-RAM data register then loads the next four cursor pixels, and so on. See the register bit definitions
in Sections 2.3.18.9 and 2.3.18.10.
To read from the cursor RAM, the address of the first cursor-RAM location to be read is loaded into the
cursor-RAM address registers. Then a read is performed on the cursor-RAM data register [0A (hex) of the
index register]. Similar to the cursor-RAM write operation, when the read is completed the cursor-RAM
address register is automatically incremented and further reads read successive cursor RAM locations.
The cursor RAM is written and read using the same hardware registers, so any task updating either of these
on an interrupt thread must save and restore the cursor-RAM LS address [index 08 (hex)] and cursor-RAM
MS address [index 09 (hex)] registers.
NOTES:
When the cursor-RAM address is to be written, always write both the cursor-RAM
LS and MS address registers with the cursor-RAM LS address register first.
The cursor-generation logic requires the use of active low sync inputs. Vertical
retrace is determined by detecting multiple syncs in blank.
The video front-porch time must be at least one RCLK period. The video
back-porch time must be at least 80 pixel clock periods.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP3025-175 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| TVP3030-175 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-220 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-250 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3409-170 | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3025-135PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-175PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3025-220PCE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3026 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
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