參數(shù)資料
型號(hào): TTRN012G7
廠商: Lineage Power
英文描述: Clock Synthesizer, 16:1 Data Multiplexer(2.5 Gbits/s and 2.7 Gbits/s)(時(shí)鐘合成器,16:1數(shù)據(jù)多路復(fù)用器(2.5 G位/秒和2.7 G位/秒))
中文描述: 時(shí)鐘合成器,16:1數(shù)據(jù)復(fù)用器(2.5 Gb /秒和2.7 Gb /秒)(時(shí)鐘合成器,16:1數(shù)據(jù)多路復(fù)用器(2.5摹位/秒和2.7克位/秒))
文件頁(yè)數(shù): 20/22頁(yè)
文件大?。?/td> 394K
代理商: TTRN012G7
TTRN012G5 and TTRN012G7
Clock Synthesizer, 16:1 Data Multiplexer
Preliminary Data Sheet
August 2000
20
Lucent Technologies Inc.
Timing Characteristics
(continued)
Transmit Timing
(continued)
Figure 9 shows the timing relationship between the 2.5 GHz or 2.7 GHz output clock (CK2G5P/N) and the
2.5 Gbits/s or 2.7 Gbits/s output data (D2G5P/N).
5-7726(F).er.4
Figure 9. Transmit Timing Waveform with 2.5 GHz or 2.7 GHz Clock
The 2.5 GHz or 2.7 GHz output clock and data signals from Figure 9 are characterized in Table 17.
Table 17. CML Output Pin ac Timing Characteristics
Applicable
Pins
CK2G5P/N
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Duty Cycle
2.48832 GHz Clock Period
2.66606 GHz Clock Period
Time Delay from Clock Edge
to Data Edge
Rise, Fall Times:
20%—80%
Transition Skew Rise to Fall
RREF1 = 1.8 k
RREF2 = 1.5 k
R
L
= 50
All signals
differential
40
151
50
402
375
201
60
251
%
ps
ps
ps
t
PERIOD
D2G5P/N,
CK2G5P/N,
LBDP/N
t
DD
t
RISE
,
t
FALL
t
SKEW
50
80
120
ps
–10
0
10
ps
OUTPUT
CK2G5P
CK2G5N
OUTPUT
D2G5P/N
DATA 1
t
PERIOD
DATA 2
DATA 3
t
DD
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