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參數(shù)資料
| 型號： | TTS3816B4E-6B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2M x 16Bit x 4 Banks synchronous DRAM |
| 中文描述： | 200萬× 16 × 4銀行同步DRAM |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 274K |
| 代理商： | TTS3816B4E-6B |
M
.tec
T
T
S3816B4E
Revision_1.1
1
TwinMOS Technologies Inc.
Sep. 2000
2M x 16Bit x 4 Banks synchronous DRAM
GENERAL DESCRIPTION
The T
T
S3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits,
fabricated with M’tec high performance CMOS technology. Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system
applications.
FEATURES
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four-banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
ORDERING INFORMATION
Part No.
Max Freq.
Interface
Package
T
T
S
38
16B4E-7
100MHz 2-2-2
T
T
S
38
16B4E-6
133MHz 3-3-3
T
T
S
38
16B4E-6A
100MHz 2-3-3
T
T
S
38
16B4E-6B
133MHz 2-3-2
T
T
S
38
16B4E-6C
133MHz 2-2-2
T
T
S
38
16B4E-6D
150MHz 3-3-3
T
T
S
38
16B4E-6E
166MHz 3-3-3
LVTTL
54
TSOP(II)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TTS3816B4E-6C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2M x 16Bit x 4 Banks synchronous DRAM |
| TTS3816B4E-6D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2M x 16Bit x 4 Banks synchronous DRAM |
| TTS3816B4E-6E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2M x 16Bit x 4 Banks synchronous DRAM |
| TTS3816B4E-7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2M x 16Bit x 4 Banks synchronous DRAM |
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