參數(shù)資料
型號(hào): TSS463-AA
英文描述: TSS463-AA [Updated 3/03. 60 Pages]
中文描述: TSS463 -機(jī)管局[更新3月3日。 60頁]
文件頁數(shù): 2/52頁
文件大小: 268K
代理商: TSS463-AA
TSS461C
2
Rev. D (22 Feb 01)
Figure 1. Block Diagram
I/O Type
I/O TTL
Pin Name
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
ALE
RD (Vss)
WR (R/W)
CS (E)
INT
Pin No
21
22
23
24
1
2
3
4
7
13
14
8
6
Pin Function
Multiplexed address and data
bus. The address is latched on
the falling edge of ALE.
I trigger TTL
Address Latch Enable
Read command
Write command
Chip select (active high)
Interrupt
Open drain
I trigger
CMOS
pulldown
I
CMOS
Pull down
RESET
19
Asynchronous general reset -
glitch filtered (
12ns)
RxD0
RxD1
RxD2
TxD
XTAL1
XTAL2
CKOUT
17
15
16
18
9
10
12
VAN bus inputs
3–state
I
O
O
VAN bus output
Crystal oscillator or clock in-
put pins
24 pin SOP
Buffered clock output enabled
if no reset
Oscillator ground
+ 5 V power supply
Ground
Power
Ground
Figure 2. Pinout
TEST/Vss
VCC
vss
11
5
20
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