- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373745 > TSS461CD LAN Node Controller PDF資料下載
參數(shù)資料
| 型號： | TSS461CD |
| 英文描述： | LAN Node Controller |
| 中文描述： | 網(wǎng)絡(luò)節(jié)點控制器 |
| 文件頁數(shù)： | 5/52頁 |
| 文件大小： | 268K |
| 代理商： | TSS461CD |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
TSS461C
5
Rev. D (22 Feb 01)
5.1.1. INTEL Mode
The INTEL mode interface consists of 13 pins. 8 pins are the multiplexed address and data bus, and the rest are the
address strobe, the read and write commands, the chip select and the interrupt request pins.
To access the memory locations in INTEL mode, the processor must first assert a valid address on the multiplexed
address and data bus and drive the address strobe pin high. When the required set-up time has passed the processor must
drive the address strobe low, and keep the address valid for the required hold time.
The processor must then either assert the data to be written on the address and data bus, if a write is intended, or float
the data bus for a read. The next step is to drive either the write or read command pins low, according to the function
required, and at the same time drive the chip select pin high.
The TSS461C access cycle is then terminated by driving the chip select and command pins low.
Note, that the chip select pin may be driven high for the entire access cycle, and may also remain high during and after
the termination of the cycle.
ALE
AD[7:0]
RD
WR
CS
ADDRESS
DATA TO BE
WRITTEN
ADDRESS
DATA
READ
WRITE CYCLE
READ CYCLE
Figure 4. INTEL Read and Write Cycles.
5.1.2. MOTOROLA Mode
In MOTOROLA mode the WR pin becomes the R/W command, the RD pin must be connected to ground and the CS
pin becomes the E strobe. This means that there is no separate chip select input, i.e. if some external decoder is to be
used, this decoder should not drive the E input high unless the processors E output is high as well.
Please refer to Figure 5. for the MOTOROLA read and write cycles. The main difference between INTEL and
MOTOROLA mode is that the timing in INTEL mode is referenced to the command signals (RD and WR), but in
MOTOROLA mode the reference is the E signal.
ALE
AD[7:0]
VSS (RD)
R/W (WR)
E (CS)
ADDRESS
DATA TO BE
WRITTEN
ADDRESS
DATA
READ
WRITE CYCLE
READ CYCLE
Figure 5. MOTOROLA Read and Write Cycles.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSS461CR | LAN Node Controller |
| TSS463-AA | TSS463-AA [Updated 3/03. 60 Pages] |
| TSS463D | Industrial Control IC |
| TSS463R | Industrial Control IC |
| TSS461E | VAN Data Link Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSS461CR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| TSS461C-TDRZ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC ASICS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| TSS461CVAN | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:Van Controller Serial Interface |
| TSS461E | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
| TSS461E_06 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:VAN Data Link Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。