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TSS461C
18
Rev. D (22 Feb 01)
Status bits give permanent information on the diagnosis performed, whatever the programmed operating mode. This
is encoded over three bits: Sa, Sb and Sc.
Sa and Sb bits indicate the four possible states of the VAN bus
Table 1. Status bits: Sa & Sb
Sa
Sb
Communication
Mode
nominal
0
0
Fault
no fault on VAN bus
Status
differential communication on DATA and DATA
Mode
degraded on DATA
0
1
Fault
fault on DATA
Status
communication on DATA
Mode
degraded on DATA
1
0
Fault
fault on DATA
Status
communication on DATA
Mode
major error
1
1
Fault
fault on DATA and DATA
Status
no communication on DATA and DATA (attempt to communicate alternatively on
DATA then DATA every SDC period)
Sc bit sets to 1 as soon as one of the three inputs (RXD2, RXD1, RXD0) differs from the others in the input
comparison analysis performs by the diagnosis system, S2 is set.
The only ways to reset this status bit are through the RI signal or a general reset.
8.2. Internal Operations
8.2.1. Digital Filtering
If several spurious pulses occur during one bit, the diagnosis for defective conductor may be corrupted. To avoid such
errors, digital filters are implemented.
Filtering operation is based on sampling of the comparator output signals. A transition is taken into account only if
it is observed over five samples (1/16
th
of timeslot).
8.2.2. Transition Analyses
These analyses are continuously done on the effective edges on comparators after digital filtering.
Asynchronous diagnosis
The asynchronous diagnosis is done by comparing the number of edges on DATA and DATA.
If four edges are detected on one input and no edges on the other during the same peiod, the second input is
considered faulty and the diagnosis mode will change to one of the degraded modes.
Synchronous diagnosis
The synchronous diagnosis counts the number of edges on the data input connected to the reception logic during
one SDC period.
If there are less than four edges during one SDC period, the diagnosis mode will change to the major error mode.