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| 型號(hào)： | TSB12LV32-EP |
| 英文描述： | IC APEX 20KE FPGA 100K 324-FBGA |
| 中文描述： | 軍事增強(qiáng)塑料電機(jī)及電子學(xué)工程師聯(lián)合會(huì)1394-1995和P1394a兼容通用鏈路層控制器 |
| 文件頁(yè)數(shù)： | 88/106頁(yè) |
| 文件大?。?/td> | 605K |
| 代理商： | TSB12LV32-EP |
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7
–
10
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
20 21
31
30
29
28
27
26
25
24
23
22
0
0
Number of quadlets
ackCode
0
0
0
0
spd
0
0
Phy Configuration Quadlet
0
0
0
17
16
Logical inverse of the Phy Configuration Quadlet
Figure 7
–
12. Received Phy Configuration Packet Format
Table 7
–
8. Receive Phy
–
Configuration Packet
FIELD NAME
DESCRIPTION
numofQuadlets
Total number of quadlets in the packet. This field is equal to 2 in this case.
ackCode
This 5
–
bit field holds the acknowledge code sent by the receiver for the current
packet. In this case, the ackCode is equal to 1 (ack_complete)
spd
The spd field indicates the speed at which the current packet was sent. In this
case, the spd field is equal to
‘
00
’
(S100)
7.3.1
7.3.1.1
The reception of a Phy ping packet causes the node identified by Phy_ID to transmit Self-ID packet(s) that
reflect the current configuration and status of the Phy. The ping packet provides a method of measuring the
round-trip delay of packets between two nodes on the bus that are farthest from one another in terms of cable
hops. The format of this packet is shown in Figure 7
–
13 and described in Table 7
–
9.
transmitted first
Extended Phy Packets
Ping Packets
0
0
Phy_ID
0
0
type (0)
0
0
0
0
0
0
0
0
Logical inverse of the first quadlet
transmitted last
0
0
0
0
0
0
0
0
0
0
Figure 7
–
13. Ping Packet Format
Table 7
–
9. Ping Packet Fields
FIELD NAME
DESCRIPTION
Phy_ID
Physical node identifier of the destination of this packet
type
Extended Phy packet type (zero identifies ping packet)
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| TSB12LV01BPZ | FPGA (Field-Programmable Gate Array) |
| TSB12LV26-EP | 672-pin FineLine BGA |
| TSB12LV22PZP | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB12LV32I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller |
| TSB12LV32IPZ | 功能描述:1394 接口集成電路 General-Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV32IPZEP | 制造商:Texas Instruments 功能描述:1394 I-TEMP 1394 GENERAL-PURPOSE LINK LAYER CONTROLLER (GP2L - Rail/Tube |
| TSB12LV32IPZG4 | 功能描述:1394 接口集成電路 General Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV32PZ | 功能描述:1394 接口集成電路 General-Purpose Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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