2000 Oct 24
2
Philips Semiconductors
Product specification
2.7 GHz I
2
C-bus controlled low phase
noise frequency synthesizer
TSA5059A
FEATURES
Complete 2.7 GHz single chip system
Optimized for low phase noise
Selectable divide-by-two prescaler
Operationupto2.3 GHzwithoutdivide-by-twoprescaler
(satellite zero-IF applications) and up to 2.7 GHz with
divide-by-two prescaler
Selectable reference divider ratio
Selectable crystal or comparison frequency output
Four selectable charge pump currents
Four selectable I
2
C-bus addresses
Standard and fast mode I
2
C-bus
I
2
C-bus compatible with 3.3 and 5 V microcontrollers
5-level Analog-to-Digital Converter (ADC)
Low power consumption
Three I/O ports and one output port.
APPLICATIONS
Satellite zero-IF and non-zero-IF tuning systems
Digital set-top boxes.
GENERAL DESCRIPTION
The TSA5059A is a single chip PLL frequency synthesizer
designed for satellite tuning systems up to 2.7 GHz.
TheRF preamplifierdrivesthe17-bitmaindividerenabling
a step size equal to the comparison frequency, for an input
frequency up to 2.3 GHz covering the complete satellite
zero-IF frequency range. A fixed divide-by-two additional
prescaler can be inserted between the preamplifier and
themaindividerforafrequencybetween2.3 and 2.7 GHz.
In this case, the step size is twice the comparison
frequency.
The comparison frequency is obtained from an on-chip
crystal oscillator that can also be driven from an external
source. Either the crystal frequency or the comparison
frequency can be switched to the XT/COMP output pin to
drive the reference input of another synthesizer or the
clock input of a digital demodulation IC.
Bothdividedandcomparisonfrequencyarecomparedinto
the fast phase detector which drives the charge pump.
The loop amplifier is also on-chip, excepted an external
NPN transistor to drive directly the 33 V tuning voltage.
ControldataisenteredviatheI
2
C-bus;fiveserialbytesare
required to address the device, select the main divider
ratio, the reference divider ratio, program the four output
ports, set the charge pump current, select the prescaler by
two, select the signal to switch to the XT/COMP output pin
and select a specific test mode. Three of the four output
ports can also be used as input ports and a 5-level ADC is
provided. Digital information concerning the input ports
and the ADC canbe readout of the TSA5059A onthe SDA
line (one status byte) during a READ operation. A flag is
set when the loop is ‘in-lock’ and is read during a READ
operation, as well as the Power-on reset flag. The device
has four programmable addresses, programmed by
applying a specific voltage at pin AS, enabling the use of
multiple synthesizers in the same system.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TSA5059AT
TSA5059ATS
SO16
SSOP16
plastic small outline package; 16 leads; body width 3.9 mm
plastic shrink small outline package; 16 leads; body width 4.4 mm
SOT109-1
SOT369-1