參數(shù)資料
型號(hào): TSA5059
廠商: NXP Semiconductors N.V.
英文描述: 2.7 GHz I2C-bus controlled low phase noise frequency synthesizer
中文描述: 2.7千兆赫的I2C控制的低相位噪聲頻率合成器總線
文件頁(yè)數(shù): 13/24頁(yè)
文件大?。?/td> 151K
代理商: TSA5059
1999 Oct 05
13
Philips Semiconductors
Preliminary specification
2.7 GHz I
2
C-bus controlled low phase
noise frequency synthesizer
TSA5059
Notes
1.
2.
Asymmetrical drive on pin RFA or RFB; see Fig.3.
The drive level is expected with the crystal at series resonance with a series resistance of 50
. The value will be
different with another crystal.
To drive pin XTAL from the pin XT/COMP of another TSA5059, couple the signal through a capacitor of 1 nF
(to remove the DC level), in series with an 1.2 k
resistor, see Fig.5.
3.
Tuning voltage output (pin VT)
I
lO(off)
leakage current when switched off
XCE = 0; XCS = 1;
T2 = 1; V
VT
= 33 V
when the loop is
locked; normal mode;
V
VT
= 33 V; pull-up
resistor of 27 k
10
μ
A
V
O
output voltage
0.25
32.7
V
XT/COMP output (pin XT/COMP)
V
O(p-p)
Input/output and output ports (pins P0, P1, P2 and P3)
AC output voltage (peak-to-peak value)
XCE = 1
400
mV
I
lO
V
O(sat)
V
IL
V
IH
ADC input (pin ADC)
port leakage current
output port saturation voltage
LOW-level input voltage
HIGH-level input voltage
port off; V
O
= V
CC
port on; I
sink
= 10 mA
3.0
0.2
10
0.4
1.5
μ
A
V
V
V
I
LIH
I
LIL
Address selection (pin AS)
HIGH-level input leakage current
LOW-level input leakage current
V
ADC
= V
CC
V
ADC
= 0 V
10
10
μ
A
μ
A
I
LIH
I
LIL
SCL and SDA inputs (pins SCL and SDA)
HIGH-level input leakage current
LOW-level input leakage current
V
AS
= V
CC
V
AS
= 0 V
0.5
1
mA
mA
V
IL
V
IH
I
LIH
LOW-level input voltage
HIGH-level input voltage
HIGH-level input leakage current
2.3
1.5
V
V
V
IH
= 5.5 V
V
CC
= 5.5 V
V
CC
= 0 V
V
IL
= 0 V; V
CC
= 5.5 V
10
10
10
400
μ
A
μ
A
μ
A
kHz
I
LIL
f
SCL
SDA output (pin SDA)
LOW-level input leakage current
SCL clock frequency
V
O(ack)
output voltage during acknowledge
I
sink
= 3 mA
I
sink
= 6 mA
0.4
0.6
V
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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