參數(shù)資料
型號(hào)： TS8882VF20
文件頁(yè)數(shù)： 32/42頁(yè)
文件大?。?/td> 1703K
代理商： TS8882VF20
32
TS68882
2119A
–
12/01
Reset (RESET)
This active-low input signal causes the TS 68882 to initialize the floating-point data registers to
non-signaling not-a-numbers (NANs) and clears the floating-point control, status, and instruc-
tion address registers.
When performing a power-up reset, external circuitry should keep the RESET line asserted to
a minimum of four clock cycles after V
CC
is within tolerance. This assures correct initialization
of the TS 68882 when power is applied. For compatibility with all TS 68000 Family devices,
100 milliseconds should be used as the minimum.
When performing a reset of the TS 68882 after V
CC
has been within tolerance for more than
the initial power-up time, the RESET line must have an asserted pulse width which is greater
than two clock cycles. For compatibility with all TS 68000 Family devices, 10 clock cycles
should be used as the minimum.
Clock (CLK)
The TS 68882 clock input is a TTL-compatible signal that is internally buffered for develop-
ment of the internal clock signals. The clock input should be a constant frequency square
wave with no stretching or shaping techniques required. The clock should not be gated off at
any time and must conform to minimum and maximum period and pulse width times.
Sense Device (SENSE)
This pin may be used optionally as an additional GND pin, or as an indicator to external hard-
ware that the TS 68882 is present in the system. This signal is internally connected to the
GND of the die, but it is not necessary to connect it to the external ground for correct device
operation. If a pullup resistor (which should be larger than 10 k
) is connected to this pin loca-
tion, external hardware may sense the presence of the TS 688882 in a system.
Power (V
CC
and GND)
These pins provide the supply voltage and system reference level for the internal circuitry of
the TS 68882. Care should be taken to reduce the noise level on these pins with appropriate
capacitance decoupling.
No Connect (NC)
One pin of the TS 68882 package is designated as a no connect (NC). This pin position is
reserved for future use, and should not be used for signal routing or connected to V
CC
or GND.
Interfacing Methods
TS 68882/TS 68020 or TS 68030 interfacing
The following paragraphs describe how to connect the TS 68882 to an TS 68020 or TS 68030
for coprocessor operation via an 8-, 16-, or 32-bit data bus.
32-Bit Data Bus
Coprocessor
Connection
Figure 18 illustrates the coprocessor interface connection of an TS 68882 to an TS 68020/TS
68030 via a 32-bit data bus. The TS 68882 is configured to operate over a 32-bit data bus
when both the A0 and SIZE pins are connected to V
CC
.
Table 12.
DSACK Assertions
Data Bus
A4
DSACK1
DSACK2
Comments
32-Bit
1
L
L
Valid data on D31-D0
32-Bit
0
L
H
Valid data on D31-D16
16-Bit
x
L
H
Valid data on D31-D16 or D15-D0
8-Bit
x
H
L
Valid data on D31-D24, D23-D16, D15-D8, D7-D0
All
x
H
H
Insert Wait States in Current Bus Cycle
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