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參數(shù)資料
| 型號(hào)： | TS87C52X2-VLEB |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 40 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 1.40 MM HEIGHT, VQFP-44 |
| 文件頁(yè)數(shù)： | 20/83頁(yè) |
| 文件大?。?/td> | 8336K |
| 代理商： | TS87C52X2-VLEB |
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195
7679H–CAN–08/08
AT90CAN32/64/128
17.11 USART Register Description
17.11.1
USART0 I/O Data Register – UDR0
17.11.2
USART1 I/O Data Register – UDR1
Bit 7:0 – RxBn7:0: Receive Data Buffer (read access)
Bit 7:0 – TxBn7:0: Transmit Data Buffer (write access)
The USARTn Transmit Data Buffer Register and USARTn Receive Data Buffer Registers share
the same I/O address referred to as USARTn Data Register or UDRn. The Transmit Data Buffer
Register (TXBn) will be the destination for data written to the UDRn Register location. Reading
the UDRn Register location will return the contents of the Receive Data Buffer Register (RXBn).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to
zero by the Receiver.
The transmit buffer can only be written when the UDREn flag in the UCSRnA Register is set.
Data written to UDRn when the UDREn flag is not set, will be ignored by the USARTn Transmit-
ter. When data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter
will load the data into the Transmit Shift Register when the Shift Register is empty. Then the
data will be serially transmitted on the TxDn pin.
The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the
receive buffer is accessed.
17.11.3
USART0 Control and Status Register A – UCSR0A
17.11.4
USART1 Control and Status Register A – UCSR1A
Bit 7 – RXCn: USARTn Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when the receive
buffer is empty (i.e., does not contain any unread data). If the Receiver is disabled, the receive
buffer will be flushed and consequently the RXCn bit will become zero. The RXCn flag can be
used to generate a Receive Complete interrupt (see description of the RXCIEn bit).
Bit
7
6
543
210
RXB0[7:0]
UDR0 (Read)
TXB0[7:0]
UDR0 (Write)
Read/Write
R/W
Initial Value
0
Bit
7
6
543
210
RXB1[7:0]
UDR1 (Read)
TXB1[7:0]
UDR1 (Write)
Read/Write
R/W
Initial Value
0
Bit
765
4321
0
RXC0
TXC0
UDRE0
FE0
DOR0
UPE0
U2X0
MPCM0
UCSR0A
Read/Write
R
R/W
R
R/W
Initial Value
001
0000
0
Bit
765
4321
0
RXC1
TXC1
UDRE1
FE1
DOR1
UPE1
U2X1
MPCM1
UCSR1A
Read/Write
R
R/W
R
R/W
Initial Value
001
0000
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS87C54 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| TS87C54X2 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP |
| TS87C54X2-LCA | 功能描述:IC MCU 8BIT 16K OTP 30MHZ 40-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 標(biāo)準(zhǔn)包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設(shè)備:POR，WDT 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:32KB（32K x 8） 程序存儲(chǔ)器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| TS87C54X2-LCAD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|8051 CPU|CMOS|DIP|40PIN|PLASTIC |
| TS87C54X2-LCB | 功能描述:IC MCU 8BIT 16K OTP 30MHZ 44PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
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