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參數(shù)資料
| 型號： | TS8388BCG |
| 英文描述： | A/D CONVERTER |
| 中文描述： | 的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 2/43頁 |
| 文件大?。?/td> | 1530K |
| 代理商： | TS8388BCG |
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TS8388BG
Product Specification
TABLE OF CONTENTS
1.
SIMPLIFIED BLOCK DIAGRAM....................................................................................................................................3
2.
FUNCTIONAL DESCRIPTION ........................................................................................................................................3
3.
SPECIFICATIONS..............................................................................................................................................................4
3.1.
3.2.
1.3.
1.4.
1.5.
1.6.
1.7.
ABSOLUTE MAXIMUM RATINGS (SEE NOTES BELOW).................................................................................................................... 4
RECOMMENDED CONDITIONS OF USE ............................................................................................................................................. 4
ELECTRICAL OPERATING CHARACTERISTICS................................................................................................................................. 5
TIMING DIAGRAMS................................................................................................................................................................................ 9
EXPLANATION OF TEST LEVELS ...................................................................................................................................................... 10
FUNCTIONS DESCRIPTION................................................................................................................................................................ 10
DIGITAL OUTPUT CODING................................................................................................................................................................. 10
PACKAGE DESCRIPTION.............................................................................................................................................11
4.
4.1.
4.2.
4.3.
4.4.
4.5.
TS8388BG PIN DESCRIPTION............................................................................................................................................................ 11
TS8388BG PINOUT OF CBGA72 PACKAGE ...................................................................................................................................... 12
TS8388BG CAPACITIES AND RESISTANCES IMPLANT .................................................................................................................. 13
OUTLINE DIMENSIONS - 72 PINS CBGA........................................................................................................................................... 14
THERMAL
AND MOISTURE
CHARACTERISTICS................................................................................................................................... 15
TYPICAL CHARACTERIZATION RESULTS.............................................................................................................16
5.
5.1.
5.2.
5.3.
5.4.
5.5.
5.6.
5.7.
5.8.
5.9.
5.10.
STATIC LINEARITY – FS = 50 MSPS / FIN = 10 MH
Z
......................................................................................................................... 16
EFFECTIVE NUMBER OF BITS VERSUS POWER SUPPLIES VARIATION ..................................................................................... 17
TYPICAL FFT RESULTS...................................................................................................................................................................... 18
SPURIOUS FREE DYNAMIC RANGE VERSUS INPUT AMPLITUDE................................................................................................ 19
DYNAMIC PERFORMANCE VERSUS ANALOG INPUT FREQUENCY ............................................................................................. 21
EFFECTIVE NUMBER OF BITS (ENOB) VERSUS SAMPLING FREQUENCY.................................................................................. 22
SFDR VERSUS SAMPLING FREQUENCY ......................................................................................................................................... 22
TS8388BG ADC PERFORMANCES VERSUS JUNCTION TEMPERATURE..................................................................................... 23
TYPICAL FULL POWER INPUT BANDWIDTH .................................................................................................................................... 24
ADC STEP RESPONSE................................................................................................................................................................... 25
DEFINITION OF TERMS................................................................................................................................................26
6.
7.
TS8388BG MAIN FEATURES.........................................................................................................................................28
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
TIMING INFORMATIONS..................................................................................................................................................................... 28
PRINCIPLE OF DATA READY SIGNAL CONTROL BY DRRB INPUT COMMAND............................................................................ 29
ANALOG INPUTS (VIN) (VINB)............................................................................................................................................................ 29
CLOCK INPUTS (CLK) (CLKB) ............................................................................................................................................................ 30
NOISE IMMUNITY INFORMATIONS.................................................................................................................................................... 33
DIGITAL OUTPUTS.............................................................................................................................................................................. 33
OUT OF RANGE BIT ............................................................................................................................................................................ 36
GRAY OR BINARY OUTPUT DATA FORMAT SELECT...................................................................................................................... 36
DIODE PIN K1....................................................................................................................................................................................... 36
ADC GAIN CONTROL PIN K6 ......................................................................................................................................................... 37
EQUIVALENT INPUT / OUTPUT SCHEMATICS ......................................................................................................38
8.
8.1.
8.2.
8.3.
ADC GAIN ADJUST EQUIVALENT INPUT CIRCUITS AND ESD PROTECTIONS.......................................................................................... 39
8.5.
GORB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS.............................................................................................. 40
8.6.
DRRB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS.............................................................................................. 40
TSEV8388BG : DEVICE EVALUATION BOARD........................................................................................................41
EQUIVALENT ANALOG INPUT CIRCUIT AND ESD PROTECTIONS................................................................................................ 38
EQUIVALENT ANALOG CLOCK INPUT CIRCUIT AND ESD PROTECTIONS................................................................................... 38
EQUIVALENT DATA OUTPUT BUFFER CIRCUIT AND
ESD PROTECTIONS.................................................................................. 39
9.
10.
ORDERING INFORMATION .....................................................................................................................................42
10.1.
10.2.
PACKAGE DEVICE.......................................................................................................................................................................... 42
EVALUATION BOARD..................................................................................................................................................................... 42
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