參數(shù)資料
型號(hào): TS8388BCFS
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
封裝: CERAMIC, QFP-68
文件頁(yè)數(shù): 16/62頁(yè)
文件大?。?/td> 1267K
代理商: TS8388BCFS
23
0860E–BDC–05/07
e2v semiconductors SAS 2007
TS8388B
7.6
Effective Number of Bits (ENOB) vs. Sampling Frequency
Analog Input Frequency: F
IN = 495 MHz and Nyquist conditions (FIN = FS/2)
Clock duty cycle 50/50, Binary output coding
Figure 7-14. ENOB (dB)
7.7
SFDR vs. Sampling Frequency
Analog Input Frequency: F
IN = 495 MHz and Nyquist conditions (FIN = FS/2)
Clock duty cycle 50/50, Binary output coding
Figure 7-15. SFDR (dBc)
2
3
4
5
6
7
8
0
200
400
600
800
1000
1200
1400
1600
ENOB
(dB)
Sampling Frequency (MSPS)
FIN = FS/2
FIN = 500 MHz
-60
-55
-50
-45
-40
-35
-30
-25
0
200
400
600
800
1000
1200
1400
1600
SFDR
(dBc)
Sampling Frequency (Msps)
FIN = FS/2
FIN = 500 MHz
相關(guān)PDF資料
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