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參數(shù)資料
| 型號： | TS68C429AMR |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS ARINC 429 Multichannel Receiver/ Transmitter MRT |
| 中文描述： | 3 CHANNEL(S), 2.5M bps, SERIAL COMM CONTROLLER, CPGA84 |
| 封裝： | PGA-84 |
| 文件頁數(shù)： | 28/43頁 |
| 文件大?。?/td> | 1638K |
| 代理商： | TS68C429AMR |
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TS68C429A
2120A–HIREL–08/02
Register Description
Any internal status change that induces a bit to be set in the status-register will generate
an interrupt if this cause is enabled by the Mask-register and if no highest priority cause
is already activated or pending.
For the receiver blocks, the priority is programmable (see interrupt vector number
description). For the transmitter block, the End-of-transmission has higher priority than
FIFO-empty and channel 1 has higher priority than channel 2 that has higher priority
than channel 3.
The RX wrong parity bit can be set only if self-test register bit 0 is set to 1.
The user has to check which receiver has it receiver control register bit 7 set to 1.
At the end of the interrupt procedure, the user must reset RX wrong parity bit to 0.
RX wrong parity is the highest interrupt priority source for the receiver part of the MRT.
The Mask Register
The mask register is accessible for reading and writing operations. The mask register is
used to disable interrupt source. The bit order is the same as in the status register. A “0”
indicates that this source is disable, a “1” enables an interrupt for this source.
Figure 24.
Mask Register
The Base Register
The base register is only accessible for writing operations by the user. The base register
must be programmed at the initialization phase. It contains the base for the vector gen-
eration during an interrupt acknowledge. This allows the use of several peripherals. If
not programmed interrupt vector is set to $OF.
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相關(guān)代理商/技術(shù)參數(shù) |
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| TS68C429AMR1B/C | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:CMOS ARINC 429 Multichannel Receiver/ Transmitter MRT |
| TS68C429AMRA | 制造商:e2v technologies 功能描述:TS68C429AMRA - Trays |
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| TS68C429AMRBCA | 制造商:e2v Aerospace & Defense 功能描述:5962-9551801MXC 制造商:e2v technologies 功能描述:MULTI CH RCVR/TRANSMITTER 84PIN PGA - Trays 制造商:e2v technologies 功能描述:5962-9551801MXC - Trays 制造商:e2v technologies 功能描述:5962-9551801XC - Rail/Tube |
| TS68C429AVF | 功能描述:IC MULTI-CH CTRLR 132CQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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