參數(shù)資料
型號(hào)： TPS54262QPWPRQ1
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： SWITCHING REGULATOR, PDSO20
封裝： GREEN, PLASTIC, HTSSOP-20
文件頁(yè)數(shù)： 4/42頁(yè)
文件大小： 2335K
代理商： TPS54262QPWPRQ1
Active Mode CCM
Active Mode DCM
PSM + DCM
LPM
PSM
Heavy Loading
LPM Pin = Don’t care
VIN
V when
t
<t
OFF
OFF-Min
V when
t <t
ON
ON-Min
~8.5 V
~32 V
Light Loading
LPM Pin = High
Very Light Loading
LPM Pin = High
Light/ Very Light Loading
LPM Pin = Low
Loading
Conditions
and
LPM
Pin
Status
SLVS996C – SEPTEMBER 2009 – REVISED JUNE 2010
www.ti.com
When VIN is less than typical VIN falling threshold level while LPM is disabled. From device specifications,
VIN typical falling threshold (LPM disabled) = 8 V (see DC Electrical Characteristics).
When RST is low.
Regulation/Feedback Voltage
The regulated output voltage (VReg) can be programmed by connecting external resistor network at VSENSE pin
(pin 14). The output voltage is selectable between 0.9 V to 18 V according to the following relationship:
(1)
Where,
R4, R5 = feedback resistors (see Figure 4)
Vref = 0.8 V (typical)
The overall tolerance of the regulated output voltage is given by Equation 2.
(2)
Where,
tolVref = tolerance of internal reference voltage (tolVref = ± 1.5%)
tolR4,tolR5 = tolerance of feedback resistors R4, R5
For a tighter tolerance on VReg, lower-value feedback resistors can be selected. However, for proper
operation in low-power mode (see Modes of Operation), it is recommended to keep R4 + R5 around 250 k
(typical).
The output tracking depends upon the loading conditions and is explained in Table 1 and is shown in Figure 10.
Table 1. Load Conditions
LOAD CONDITION
OUTPUT TRACKING
Nominal load in CCM
VReg tracks VIN approximately as: VReg = 95% (VIN – ILoad × 0.5)
To enable the tracking feature, following conditions should be met:
No load/light load in LPM
1) fSW < 600 kHz
2) VReg < 8 V, typical (related to VIN falling threshold when LPM is disabled)
Modes of Operation
TPS54262 operates in the following modes based on the output loading conditions, input voltage and LPM pin
configuration. These operating conditions and modes of operations are shown in Figure 14.
Figure 14. Modes of Operation
12
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS54262-Q1
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