參數(shù)資料
型號(hào)： TPS54262QPWPRQ1
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： SWITCHING REGULATOR, PDSO20
封裝： GREEN, PLASTIC, HTSSOP-20
文件頁數(shù)： 3/42頁
文件大?。?/td> 2335K
代理商： TPS54262QPWPRQ1
www.ti.com
SLVS996C – SEPTEMBER 2009 – REVISED JUNE 2010
OVERVIEW
The TPS54262 is a 60 V, 2 A DC/DC step down (buck) converter using voltage-control mode scheme. The
device features supervisory function for power-on-reset during system power on. Once the output voltage has
exceeded the threshold set by RST_TH pin, a delay of 1 ms/nF (based on capacitor value on Cdly terminal) is
invoked before the RST line is released high. Conversely on power down, once the output voltage falls below the
same set threshold, the RST line is pulled low only after a de-glitch filter of approximately 20 s (typical) expires.
This is implemented to prevent reset from being triggered due to fast transient line noise on the regulated output
supply.
An overvoltage monitor function, is used to limit regulated output voltage to the threshold set by OV_TH pin. Both
the RST_TH and OV_TH monitoring voltages are set to be a pre-scale of the output voltage, and thresholds
based on the internal bias voltages of the voltage comparators (0.8 V typical).
Detection of undervoltage on the regulated output is based on the RST_TH setting and will invoke RST line to be
asserted low. Detection of overvoltage on the output is based on the OV_TH setting and will not invoke the RST
line to be asserted low. However, the internal switch is commanded to turn OFF.
In systems where power consumption is critical, low-power mode (LPM) is implemented to reduce the
non-switching quiescent current during light load conditions. After the device has been operating in discontinuous
conduction mode (DCM) for at least 100 s (typ), depending upon the load current, it may enter in pulse skip
mode (PSM). The operation of when the device enters DCM is dependent on the selection of the external
components.
If thermal shutdown is invoked due to excessive power dissipation, the internal switch is disabled and the
regulated output voltage starts to decrease. Depending on the load current, the regulated output voltage could
decay and the RST_TH threshold may assert the RST output low.
DETAILED DESCRIPTION
The TPS54262 is a DC/DC converter using a voltage-control mode scheme with an input voltage feed-forward
technique. The device can be programmed for a range of output voltages with a wide input voltage range. Below
are details with regard to setting up the device, detailed functionality and the modes of operation.
Unregulated Input Voltage
The input voltage is supplied through VIN pins (pin 18 and 19) which must be externally protected against
voltage levels greater than 60 V and reverse input polarity. An external diode is connected to protect these pins
from reverse input polarity. The input current drawn from this pin is pulsed, with fast rise and fall times.
Therefore, this input line requires a filter capacitor to minimize noise. Additionally, for EMI considerations, an
input filter inductor may also be required.
NOTE
For design considerations, VIN/VReg ratios should always be set such that the minimum
required duty cycle pulse (tON-Min) is greater than 150 ns. The minimum off time (tOFF-Min) is
250 ns for all conditions.
Regulated Output Voltage
The regulated output voltage (VReg) is fed back to the device through VReg pin (pin 16). Typically, an output
capacitor of value within range of 10 F to 400 F is connected at this pin. It is also recommended to use a filter
capacitor with low ESR characteristics to minimize ripple in regulated output voltage. The VReg pin is also
internally connected to a load of ~100
, which is turned ON in the following conditions:
During startup condition, when the device is powered up with no-load, or whenever EN is toggled, the internal
load connected to VReg pin is turned ON to charge the bootstrap capacitor to provide gate drive voltage to
the switching transistor.
During normal operating conditions, when the regulated output voltage (VReg) exceeds the overvoltage
threshold (VReg_OV, preset by external resistors R1, R2, and R3), the internal load is turned ON, and this
pin is pulled down to bring the regulated output voltage down.
Copyright 2009–2010, Texas Instruments Incorporated
11
Product Folder Link(s): TPS54262-Q1
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