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參數(shù)資料
| 型號： | TPS54062DGKR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, 400 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | PLASTIC, MSOP-8 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 745K |
| 代理商： | TPS54062DGKR |
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ENAFALLING
START
STOP
ENARISING
UVLO
ENAFALLING
HYS
ENARISING
V
R
1 =
V
I1 ×
1
+ I
V
-
÷
è
-
÷
è
(
)
UVLO
ENAFALLING
UVLO
STOP
ENAFALLING
UVLO
1
HYS
R
1
V
R
2 =
V
+ R
1
I + I
-
VIN
Ruvlo1
Ruvlo2
Node
EN
10 k
W
5.8 V
T
SW
0.9967
116720
R (k ) =
(kHz)
f
W
SLVSAV1
– MAY 2011
(2)
(3)
Do not place a low-impedance voltage source with greater than 5V directly on the EN pin. Do not place a
capacitor directly on the EN pin if VEN
> 5V when using a voltage divider to adjust the start and stop voltage.
The node voltage, (see Figure 19) must remain equal to or less than 5.8V. The zener diode can sink up to
100
μA. The EN pin voltage can be greater than 5V if the VIN voltage source has an high impedance and does
not source more than 100
μA into the EN pin.
Figure 19. Node Voltage
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
The switching frequency of the TPS54062 is adjustable over a wide range from approximately 100kHz to 400
kHz by placing a resistor on the RT/CLK pin. The RT/CLK pin voltage is typically 0.53V and must have a resistor
to ground to set the switching frequency. To determine the timing resistance for a given switching frequency, use
Equation 4. To reduce the solution size one would typically set the switching frequency as high as possible, but
tradeoffs of the supply efficiency, maximum input voltage and minimum controllable on time should be
considered. The minimum controllable on time is typically 130ns and limits the maximum operating input voltage.
The maximum switching frequency is also limited by the frequency shift circuit. More discussion on the details of
the maximum switching frequency is located below.
(4)
Selecting the Switching Frequency
The TPS54062 implements current mode control which uses the COMP pin voltage to turn off the high side
MOSFET on a cycle-by-cycle basis. Each cycle the switch current and COMP pin voltage are compared, when
the peak switch current intersects the COMP voltage, the high side switch is turned off. During overcurrent
conditions that pull the output voltage low, the error amplifier will respond by driving the COMP pin high,
increasing the switch current. The error amplifier output is clamped internally, which functions as a switch current
limit.
To increase the maximum operating switching frequency at high input voltages the TPS54062 implements a
frequency shift. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 to 0.8 volts on
VSENSE pin. The device implements a digital frequency shift to enable synchronizing to an external clock during
normal startup and fault conditions. Since the device can only divide the switching frequency by 8, there is a
maximum input voltage limit in which the device operates and still have frequency shift protection. During
12
Copyright
2011, Texas Instruments Incorporated
Product Folder Link(s): TPS54062
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