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參數(shù)資料
| 型號： | TPS40040DRBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 7.2 A SWITCHING CONTROLLER, 350 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 3 X 3 MM, PLASTIC, SON-8 |
| 文件頁數(shù)： | 6/38頁 |
| 文件大?。?/td> | 741K |
| 代理商： | TPS40040DRBT |
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Gate Drive Resistors
Total Gate Charge
Synchronous Rectifier dV/dt Turn-On
SLUS700D – MARCH 2006 – REVISED DECEMBER 2007
The TPS40040/41’s adaptive gate delay circuitry monitors the HDRV-to-SW and LDRV-to-GND voltages to
determine the state of the external MOSFET switches. Any voltage drop across an external series gate drive
resistor is sensed as reduced gate voltage during turn-off and may interfere with the MOSFET timing.
DESIGN
A resistor should never be placed in series with the synchronous rectifiers gate
HINT:
and the gate trace should be kept as short as practical in the layout.
The internal voltage sensing of the external MOSFET gate voltages used by the TPS40040/1 to control the
dead-times between turn-off and turn-on can be sensitive to large MOSFET gate charges, especially when
different gate charges are used for the high-side and low-side MOSFETs. Increased gate charge increases
MOSFET switching times and decreases the dead-time between the MOSFETs switching.
MOSFETs with no more than 40 nC of total gate charge should be selected.
DESIGN
The upper switch MOSFET’s gate charge should be no less than 60% of the
HINT:
synchronous rectifier’s gate charge to minimize the turn-on/turn-off delay
mismatch between the high-side and low-side MOSFET.
As the upper switch MOSFET turns on, the switch node voltage rises from close to ground to VIN in a very short
period of time (typically 10 ns to 30 ns) resulting in very high voltage spikes on the switch node. The construction
of a MOSFET creates parasitic capacitances between its terminals, particularly the gate-to-drain and
gate-to-source, creating a capacitive divider between the drain and source of the MOSFET with the gate at its
mid-point. If the gate-to-drain charge (QGD) is larger than the gate-to-source charge (QGS), the capacitive divider
places proportionally more charge on the gate of the MOSFET as the switch node voltage rises than is shunted
to GND. In extreme cases, this can cause the synchronous rectifier gate voltage to rise above the turn on
threshold voltage of the MOSFET and causes cross-conduction. This is called dV/dt turn-on. It increases power
dissipation in both the high-side and the low-side MOSFET, reducing efficiency.
Select a synchronous rectifier MOSFET with a QGD to QGS ratio of less than
DESIGN
one and provide a wide, low resistance, low inductance loop in the synchronous
HINT:
rectifier gate drive circuit. (See Layout Consideration)
A resistor in series with the boost capacitor slows the turn on of the high-side
DESIGN
MOSFET, and reduces the dV/dt of the switch node. See Boost Capacitor
HINT:
Series Resistor section.
14
Copyright 2006–2007, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS40040DRBT | 制造商:Texas Instruments 功能描述:Peak Reflow Compatible (260 C):Yes |
| TPS40040DRBTG4 | 功能描述:DC/DC 開關(guān)控制器 Lo Vin Synch Buck DC/DC Cntrlr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| TPS40040EVM-001 | 功能描述:電源管理IC開發(fā)工具 10A Synch Buck Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS40041 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW PIN COUNT, LOW VIN (2.5 V TO 5.5 V) SYNCHRONOUS BUCK DC-TO-DC CONTROLLER WITH ENABLE |
| TPS40041DRBR | 功能描述:DC/DC 開關(guān)控制器 Low Vin Synch Buck DC/DC Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
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