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參數(shù)資料
| 型號： | TMS320V642AGDK6 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1A, 52kHz (250kHz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 48% Max Duty Cycle; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 視頻/影像定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 87/123頁 |
| 文件大?。?/td> | 1205K |
| 代理商： | TMS320V642AGDK6 |
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500.0
600.0
10
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50
60
70
80
90
100
SYSCLKOUT (MHz)
D
TOTAL POWER
6.5
Timing Parameter Symbology
6.5.1
General Notes on Timing Parameters
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Figure 6-2. Typical Operational Power Versus Frequency (F2808)
Timing parameter symbols used are created in accordance with JEDEC Standard 100. To shorten the
symbols, some of the pin names and other related terminology have been abbreviated as follows:
Lowercase subscripts and their
meanings:
a
access time
c
cycle time (period)
d
delay time
Letters and symbols and their
meanings:
H
High
L
Low
V
Valid
Unknown, changing, or don't
X
care level
Z
High impedance
f
fall time
h
r
su
t
v
w
hold time
rise time
setup time
transition time
valid time
pulse duration (width)
All output signals from the 28x devices (including XCLKOUT) are derived from an internal clock such that
all output transitions for a given half-cycle occur with a minimum of skewing relative to each other.
The signal combinations shown in the following timing diagrams may not necessarily represent actual
cycles. For actual cycle examples, see the appropriate cycle description section of this document.
Electrical Specifications
87
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