參數(shù)資料
型號(hào)： TMS320LC31-40
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： Digital Signal Processor
中文描述： 數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 12/48頁(yè)
文件大?。?/td> 636K
代理商： TMS320LC31-40
TMS320C31, TMS320LC31
DIGITAL SIGNAL PROCESSORS
SPRS035B – MARCH 1996 – REVISED JANUARY 1999
12
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
electrical characteristics over recommended ranges of supply voltage (unless otherwise noted)
(see Note 3)
PARAMETER
TEST CONDITIONS
’C31
TYP
’LC31
TYP
UNIT
MIN
2.4
MAX
MIN
MAX
VOH
VOL
IZ
II
High-level output voltage
VDD = MIN, IOH = MAX
VDD = MIN, IOH = MAX
VDD = MAX
VI = VSS to VDD
3
2
V
Low-level output voltage
0.3
0.6
0.4
V
μ
A
μ
A
High-impedance current
– 20
+ 20
– 20
+ 20
Input current
– 10
+ 10
– 10
+ 10
IIP
Input current (with internal
pullup)
Inputs with internal pullups§
– 600
20
– 600
10
μ
A
f = 33 MHz
fx = 33 MHz
’LC31 33
’LC31-33
150
325
120
250
TA = 25
C,
VDD= MAX
VDD = MAX
°
fx = 33 MHz
’C31-33
(ext. temp)
150
325
ICC
Supply current#
fx = 40 MHz
fx = 50 MHz
fx = 60 MHz
fx = 80 MHz
IDLE2
’C31-40
160
390
150
300
mA
’C31-50
200
425
’C31-60
225
475
’C31-80
275
550
IDD
Supply current
Standby,
Clocks shut off
50
20
μ
A
Ci
Input
capacitance
All inputs except CLKIN
15||
15||
pF
CLKIN
25
20||
25
20||
Co
All input and output voltage levels are TTL compatible.
For ’C31, all typical values are at VDD = 5 V, TA (air temperature) = 25
°
C. For ’LC31, all typical values are at VDD = 3.3 V,
TA (air temperature) = 25
°
C.
§Pins with internal pullup devices: INT3–INT0, MCBL/MP.
Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test conditions, which
are not sustained during normal device operation. These conditions consist of continuous parallel writes of a checkerboard pattern at the
maximum rate possible. See Calculation of TMS320C30 Power Dissipation Application Report(literature number SPRA020).
#fx is the input clock frequency.
||Specified by design but not tested
NOTE 6: All voltage values are with respect to VSS. All input and output voltage levels are TTL-compatible. CLKIN can be driven by a CMOS
clock.
Output capacitance
pF
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