參數(shù)資料
型號： TMS320AV420
英文描述： Color Encoder Circuit
中文描述： 顏色編碼器電路
文件頁數(shù)： 118/132頁
文件大小： 1707K
代理商： TMS320AV420
SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
118
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
peripheral register description (continued)
Table 19. LF240xA/LC240xA DSP Peripheral Register Description (Continued)
ADDR
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
REG
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
DIGITAL I/O CONTROL REGISTERS (CONTINUED)
07096h
—
F6DIR
F5DIR
F4DIR
F3DIR
F2DIR
F1DIR
F0DIR
PFDATDIR
—
IOPF6
IOPF5
IOPF4
IOPF3
IOPF2
IOPF1
IOPF0
07098h
A7DIR
A6DIR
A5DIR
A4DIR
A3DIR
A2DIR
A1DIR
A0DIR
PADATDIR
IOPA7
IOPA6
IOPA5
IOPA4
IOPA3
IOPA2
IOPA1
IOPA0
07099h
Illegal
0709Ah
B7DIR
B6DIR
B5DIR
B4DIR
B3DIR
B2DIR
B1DIR
B0DIR
PBDATDIR
IOPB7
IOPB6
IOPB5
IOPB4
IOPB3
IOPB2
IOPB1
IOPB0
0709Bh
Illegal
0709Ch
C7DIR
C6DIR
C5DIR
C4DIR
C3DIR
C2DIR
C1DIR
C0DIR
PCDATDIR
IOPC7
IOPC6
IOPC5
IOPC4
IOPC3
IOPC2
IOPC1
IOPC0
0709Dh
Illegal
0709Eh
—
—
—
—
—
—
—
D0DIR
PDDATDIR
—
—
—
—
—
—
—
IOPD0
0709Fh
Illegal
ANALOG-TO-DIGITAL CONVERTER (ADC) REGISTERS
070A0h
—
ADC
S/W RESET
SOFT
FREE
ACQ
PRESCALE3
ACQ
PRESCALE2
ACQ
PRESCALE1
ACQ
PRESCALE0
ADCCTRL1
CONV PRE-
SCALE (CPS)
CONTIN-
UOUS RUN
INT
PRIORITY
SEQ1/2
CASCADE
—
—
—
—
070A1h
EVB SOC
EN SEQ1
RESET
SEQ1
SOC SEQ1
SEQ1 BUSY
INT ENA
SEQ1 Mode1
INT ENA
SEQ1 Mode0
INT FLAG
SEQ1
EVA SOC
EN SEQ1
ADCCTRL2
EXT SOC
EN SEQ1
Reset SEQ2
SOC SEQ2
SEQ2 BUSY
INT ENA
SEQ2 Mode1
INT ENA
SEQ2 Mode0
INT FLAG
SEQ2
EVB SOC
EN SEQ2
—
—
—
—
—
—
—
—
070A2h
—
MAXCONV2
2
MAXCONV2
1
MAXCONV2
0
MAXCONV1
3
MAXCONV1
2
MAXCONV1
1
MAXCONV1
0
MAXCONV
070A3h
CONV 3
CONV 3
CONV 3
CONV 3
CONV 2
CONV 2
CONV 2
CONV 2
CHSELSEQ1
CONV 1
CONV 1
CONV 1
CONV 1
CONV 0
CONV 0
CONV 0
CONV 0
070A4h
CONV 7
CONV 7
CONV 7
CONV 7
CONV 6
CONV 6
CONV 6
CONV 6
CHSELSEQ2
CONV 5
CONV 5
CONV 5
CONV 5
CONV 4
CONV 4
CONV 4
CONV 4
070A5h
CONV 11
CONV 11
CONV 11
CONV 11
CONV 10
CONV 10
CONV 10
CONV 10
CHSELSEQ3
CONV 9
CONV 9
CONV 9
CONV 9
CONV 8
CONV 8
CONV 8
CONV 8
070A6h
CONV 15
CONV 15
CONV 15
CONV 15
CONV 14
CONV 14
CONV 14
CONV 14
CHSELSEQ4
CONV 13
CONV 13
CONV 13
CONV 13
CONV 12
CONV 12
CONV 12
CONV 12
—
—
—
—
SEQ CNTR3
SEQ CNTR2
SEQ CNTR1
SEQ CNTR0
070A7h
SEQ2
STATE 3
SEQ2
STATE 2
SEQ2
STATE 1
SEQ2
STATE 0
SEQ1
STATE 3
SEQ1
STATE 2
SEQ1
STATE 1
SEQ1
STATE 0
AUTO_SEQ_SR
070A8h
D9
D8
D7
D6
D5
D4
D3
D2
RESULT0
D1
D0
0
0
0
0
0
0
070A9h
D9
D8
D7
D6
D5
D4
D3
D2
RESULT1
D1
D0
0
0
0
0
0
0
070AAh
D9
D8
D7
D6
D5
D4
D3
D2
RESULT2
D1
D0
0
0
0
0
0
0
Indicates change with respect to the F243/F241 C242 device register maps
Indicates change with respect to the F243/F241, C242 device register maps.
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