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參數(shù)資料
| 型號： | TMPR28051 |
| 英文描述： | TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device |
| 中文描述： | TMPR28051 STS-1/AU-3（的STM - 0）映射為版本的設備5設備咨詢 |
| 文件頁數(shù)： | 61/90頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TMPR28051 |
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Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
47
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Register Architecture Description
(continued)
DS1/E1 Insertion Selection
Table 16. Registers 0x17—0x32: DS1/E1 Insertion Selection
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
Value is
0.
0x17—0x2B
—
7
—
Registers 0x17—0x2B report DS1 or E1 conditions.
The DS1/E1AIS[1:21] bits report the received DS1/E1
AIS condition. When any of these bits is 1, the corre-
sponding DS1/E1 input has an AIS condition. This value
represents the current received state. The AIS condition
is not latched by these bits. The indication is reset when
the condition is no longer true.
The DS1/E1LOC[1:21] bits in bit 6 report the received
DS1/E1 loss of clock condition. When any of these bits
is 1, the corresponding DS1/E1 input has a received
loss of clock condition. This value represents the cur-
rent received state. The loss of clock condition is not
latched by these bits. The indication is reset when the
condition is no longer true.
The DS1/E1LB[1:21] bits in bit 5 are used to force DS1/
E1 loopback from output to input. When any of these
bits is 1, the corresponding DS1/E1 input is overwritten
by the outgoing DS1/E1 signal for that location.
DS1/E1INS4_[1:21] The DS1/E1INS[4:0]_[1:21] bits in registers 0x17—
0x2B are used to select the DS1/E1 input for the trans-
mit VT1.5 slots. The DS1/E1 selected corresponds to
the decimal value of the programmed 5 bits. If these bits
contain 00000, the device will insert unequipped into
the corresponding VT1.5 slot. If these bits contain
11101—11110, the device will insert AIS-V into the cor-
responding VT1.5 slot. Since the device defaults all 28
of these registers to the value 00000, all of the 28 VT1.5
slots begin transmitting unequipped following reset. The
value 11111 inserts the test pattern. Addresses 0x17—
0x32 correspond to VT1.5s as shown in Table 17,
page 49.
DS1/E1AIS[1:21]
6
DS1/E1LOC[1:21]
5
DS1/E1LB[1:21]
4
3
2
1
0
DS1/E1INS3_[1:21]
DS1/E1INS2_[1:21]
DS1/E1INS1_[1:21]
DS1/E1INS0_[1:21]
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