參數(shù)資料
型號(hào): TMP91PW18AF
廠商: Toshiba Corporation
英文描述: Quality And Reliability Assurance / Handling Precautions
中文描述: 質(zhì)量與可靠性保證/操作注意事項(xiàng)
文件頁(yè)數(shù): 36/48頁(yè)
文件大?。?/td> 390K
代理商: TMP91PW18AF
Quality and Reliability Assurance / Handling Precautions
030901
QUA-36
2002-02-20
4.3.4 Unused Pins
If unused pins are left open, some devices can exhibit input instability
problems, resulting in malfunctions such as abrupt increase in current flow.
Similarly, if the unused output pins on a device are connected to the power
supply pin, the ground pin or to other output pins, the IC may malfunction or
break down.
Since the details regarding the handling of unused pins differ from device to
device and from pin to pin, please follow the instructions given in the relevant
individual datasheets or databook.
CMOS logic IC inputs, for example, have extremely high impedance. If an
input pin is left open, it can easily pick up extraneous noise and become
unstable. In this case, if the input voltage level reaches an intermediate level,
it is possible that both the P-channel and N-channel transistors will be turned
on, allowing unwanted supply current to flow. Therefore, ensure that the
unused input pins of a device are connected to the power supply (Vcc) pin or
ground (GND) pin of the same device. For details of what to do with the pins of
heat sinks, refer to the relevant technical datasheet and databook.
4.3.5 Latch-up
Latch-up is an abnormal condition inherent in CMOS devices, in which Vcc
gets shorted to ground. This happens when a parasitic PN-PN junction
(thyristor structure) internal to the CMOS chip is turned on, causing a large
current of the order of several hundred mA or more to flow between Vcc and
GND, eventually causing the device to break down.
Latch-up occurs when the input or output voltage exceeds the rated value,
causing a large current to flow in the internal chip, or when the voltage on the
Vcc (Vdd) pin exceeds its rated value, forcing the internal chip into a
breakdown condition. Once the chip falls into the latch-up state, even though
the excess voltage may have been applied only for an instant, the large current
continues to flow between Vcc (Vdd) and GND (Vss). This causes the device to
heat up and, in extreme cases, to emit gas fumes as well. To avoid this problem,
observe the following precautions:
(1)
Do not allow voltage levels on the input and output pins either to rise
above Vcc (Vdd) or to fall below GND (Vss). Also, follow any prescribed
power-on sequence, so that power is applied gradually or in steps rather
than abruptly.
Do not allow any abnormal noise signals to be applied to the device.
Set the voltage levels of unused input pins to Vcc (Vdd) or (GND) Vss.
Do not connect outputs to one another.
(2)
(3)
(4)
4.3.6 Input/Output Protection
Wired-AND configurations, in which outputs are connected together, cannot
be used, since this short-circuits the outputs. Outputs should, of course, never
be connected to Vcc (Vdd) or GND (Vss).
Furthermore, ICs with tri-state outputs can undergo performance degradation
if a shorted output current is allowed to flow for an extended period of time.
Therefore, when designing circuits, make sure that tri-state outputs will not
be enabled simultaneously.
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