參數(shù)資料
型號： TLV320AIC34_1
廠商： Texas Instruments, Inc.
元件分類： Codec
英文描述： FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述： 四通道，低功耗音頻編解碼器的便攜式音頻/電話
文件頁數(shù)： 87/94頁
文件大小： 905K
代理商： TLV320AIC34_1
www.ti.com
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Page 0 / Register 101:
Codec A, I
2
C Address Select
READ/
WRITE
R
R
RESET
VALUE
0
0
BIT
DESCRIPTION
D7
D6
Reserved
Codec A I
2
C Address ADDR_A Terminal Status
0: When ADDR_A is in a reset condition, then the I
2
C address is 001 1000.
1: When ADDR_A is in a reset condition, then the I
2
C address is 001 1010.
Reserved
D5–D0
R
00 0000
Page 0 / Register 101:
Codec B, I
2
C Address Select
READ/
WRITE
R
R
RESET
VALUE
0
0
BIT
DESCRIPTION
D7
D6
Reserved
Codec B I
2
C Address ADDR_B Terminal Status
0: When ADDR_B is in a reset condition, then the I
2
C address is 001 1001.
1: When ADDR_B is in a reset condition, then the I
2
C address is 001 1011.
Reserved
D5–D0
R
00 0000
Page 0 / Register 102:
Clock Generation Control Register
READ/
WRITE
R/W
RESET
VALUE
00
BIT
DESCRIPTION
D7–D6
CLKDIV_IN Source Selection
00: CLKDIV_IN uses MCLK_x.
01: CLKDIV_IN uses GPIO2_x.
10: CLKDIV_IN uses BCLK_x.
11: Reserved. Do not write this sequence to these register bits.
PLLCLK_IN Source Selection
00: PLLCLK_IN uses MCLK_x.
01: PLLCLK_IN uses GPIO2_x.
10: PLLCLK _IN uses BCLK_x.
11: Reserved. Do not write this sequence to these register bits.
PLL Clock Divider N Value
0000: N = 16
0001: N = 17
0010: N = 2
0011: N = 3
…
1111: N = 15
D5–D4
R/W
00
D3–D0
R/W
0010
Page 0 / Register 103:
Left-AGC New Programmable Attack Time Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
Attack Time Register Selection
0: Attack time for the left AGC is generated from register 26.
1: Attack time for the left AGC is generated from this register.
Baseline AGC Attack Time
00: Left-AGC attack time = 7 ms
01: Left-AGC attack time = 8 ms
10: Left-AGC attack time = 10 ms
11: Left-AGC attack time = 11 ms
Multiplication Factor for Baseline AGC
000: Multiplication factor for the baseline AGC attack time = 1
001: Multiplication factor for the baseline AGC attack time = 2
010: Multiplication factor for the baseline AGC attack time = 4
011: Multiplication factor for the baseline AGC attack time = 8
100: Multiplication factor for the baseline AGC attack time = 16
101: Multiplication factor for the baseline AGC attack time = 32
110: Multiplication factor for the baseline AGC attack time = 64
111: Multiplication factor for the baseline AGC attack time = 128
Reserved. Write only zeros to these register bits.
D6–D5
R/W
00
D4–D2
R/W
000
D1–D0
R/W
00
Copyright 2007, Texas Instruments Incorporated
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TLV320AIC34
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