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www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Page 0 / Register 46:
PGA_L to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_L Output Routing Control
0: PGA_L is not routed to HPLOUT
1: PGA_L is routed to HPLOUT
D6-D0
R/W
0000000
PGA_L to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 5Page 0 / Register 47:
DAC_L1 to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_L1 Output Routing Control
0: DAC_L1 is not routed to HPLOUT
1: DAC_L1 is routed to HPLOUT
D6-D0
R/W
0000000
DAC_L1 to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 5Page 0 / Register 48:
Reserved Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
00000000
Reserved. Do not write to this register.
Page 0 / Register 49:
PGA_R to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_R Output Routing Control
0: PGA_R is not routed to HPLOUT
1: PGA_R is routed to HPLOUT
D6-D0
R/W
0000000
PGA_R to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 5.Page 0 / Register 50:
DAC_R1 to HPLOUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to HPLOUT
1: DAC_R1 is routed to HPLOUT
D6-D0
R/W
0000000
DAC_R1 to HPLOUT Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 5.
Copyright 2006–2008, Texas Instruments Incorporated
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