SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
Page 0 / Register 26:
Left AGC Control Register A
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Left AGC Enable
0: Left AGC is disabled
1: Left AGC is enabled
D6–D4
R/W
000
Left AGC Target Gain
000: Left AGC target gain = –5.5-dB
001: Left AGC target gain = –8-dB
010: Left AGC target gain = –10-dB
011: Left AGC target gain = –12-dB
100: Left AGC target gain = –14-dB
101: Left AGC target gain = –17-dB
110: Left AGC target gain = –20-dB
111: Left AGC target gain = –24-dB
D3–D2
R/W
00
Left AGC Attack Time
These time constants(1) will not be accurate when double rate audio mode is enabled.
00: Left AGC attack time = 8-msec
01: Left AGC attack time = 11-msec
10: Left AGC attack time = 16-msec
11: Left AGC attack time = 20-msec
D1–D0
R/W
00
Left AGC Decay Time
These time constants(1) will not be accurate when double rate audio mode is enabled.
00: Left AGC decay time = 100-msec
01: Left AGC decay time = 200-msec
10: Left AGC decay time = 400-msec
11: Left AGC decay time = 500-msec
(1)
Time constants are valid when DRA is not enabled. The values would change if DRA is enabled.
Page 0 / Register 27:
Left AGC Control Register B
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D1
R/W
1111111
Left AGC Maximum Gain Allowed
0000000: Maximum gain = 0.0-dB
0000001: Maximum gain = 0.5-dB
0000010: Maximum gain = 1.0-dB
…
1110110: Maximum gain = 59.0-dB
1110111–111111: Maximum gain = 59.5-dB
D0
R/W
0
Reserved. Write only '0' to this register bit.
48
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