參數(shù)資料
型號： TLV320AIC20C
廠商： Texas Instruments, Inc.
英文描述： Layout and Grounding Guidelines for TLV320AIC2x
中文描述： 為TLV320AIC2x布局和接地指南
文件頁數(shù)： 32/46頁
文件大小： 452K
代理商： TLV320AIC20C
SLAS428 AUGUST 2004
www.ti.com
32
REGISTER 05H: DAC Power Control
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15
PWDNC
R/W
1
DAC Power-Down Control
0 => DAC powered up
1 => DAC powered down
D14
Reserved
R/W
0
Reserved (During read the value of this bit is 0. Write only 0 into this location.)
Note: Only set this bit to the reset value 0 or 1
D13
ASTPWD
R/W
1
Analog Sidetone Power-down Control
0 => Analog sidetone powered up
1 => Analog sidetone powered down
D12
DAODRC
R/W
0
Audio Output Driver Control
0 => Output driver in low power mode
1 => Output driver in high power mode
D11
ASTPWF
R
1
Analog Sidetone Power-Down Flag
0 => Analog sidetone powered down is not complete.
1 => Analog sidetone powered down is complete.
D10
DAPWDN
R/W
1
DAC Power-Down Control
0 => Power up the DAC
1 => Power down the DAC
D9
Reserved
R/W
1
Reserved
Note: Only set this bit to the reset value 0 or 1
D8
VGPWDN
R/W
1
Driver Virtual Ground Power Down
0 => Power up the VGND amp
1 => Power down the VGND amp
D7
Reserved
R/W
1
Reserved
Note: Only set this bit to the reset value 0 or 1
D6
DAPWDF
R
1
DAC Power-Down Flag (See DAC Power down section of this data sheet)
0 => DAC power down is not complete.
1 => DAC power down is complete.
D5
Reserved
R/W
0
Reserved
Note: Only set this bit to the reset value 0 or 1
D4
VBIAS
R/W
0
VBIAS Voltage
0 => VBIAS output = 2.5 V
1 => VBIAS output = 2.0 V
D3D2
Reserved
R/W
0
Reserved
Note: Only set this bit to the reset value 0 or 1
D1
EFFCTL
R/W
0
Digital Audio Effects Filter Control
0 => Disable digital audio effects filter
1 => Enable digital audio effects filter
D0
DEEMPF
R/W
0
DeEmphasis Filter Enable
0 => Disable de-emphasis filter
1 => Enable de-emphasis filter
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