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參數(shù)資料
| 型號： | TLC320AD90C |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | Stereo Audio Codec(立體聲音頻編碼譯碼器) |
| 中文描述： | 立體聲音頻編解碼器（立體聲音頻編碼譯碼器） |
| 文件頁數(shù)： | 32/51頁 |
| 文件大?。?/td> | 219K |
| 代理商： | TLC320AD90C |
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2–18
2.6
Microphone Input Programmable Gain Amplifier
The TLC320AD90C is designed to allow most common microphones to be connected to it without the use
of external preamplifiers. As shown in Figure 2–7, the microphone input multiplexer is followed by a buffer
amplifier with 100-k
input impedance. This configuration allows the value of the input coupling capacitors
to be kept small while maintaining acceptable low frequency response characteristics.
A bias voltage through two 100-k
resistors is maintained on both MIC1 and MIC2 to allow for rapid
switching between the two microphones.
As shown in Figure 2–7, the reference output is designed to provide bias current for two microphones.
Figure 2–7 shows the connection of two electret microphones to the TLC320AD90C codec.
+
–
M
U
X
Vref
MIC1
MIC2
0.1
μ
F
0.1
μ
F
100 k
100 k
REFOUT
50
2.2 k
Buffer
2.2 k
Output From MIC1
TLC320AD90C
Output From MIC2
Figure 2–7. Microphone Programmable Gain Amplifier With Two Electret Microphones
2.7
Power-Down Management
The TLC320AD90C is capable of operating at reduced power when no activity is required. The state of
power down is controlled by the Power Down register (Index 26h). There are seven commands of separate
power down with the addition of modem codec. The TLC320AD90C is fully static and if the clock is stopped,
the register values are not lost. Table 2–15 lists the different power-down modes.
Table 2–15. Power-Down Modes
BITS
FUNCTION
PR0
PCM in ADCs and input MUX power down
PR1
PCM out DACs power down
PR2
Analog mixer power down (Vref on)
PR3
Analog mixer power down (Vref off)
PR4
Digital interface (AC‘97) power down (external clock off)
PR5
Internal clock disabled
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