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參數(shù)資料
| 型號： | TLC320AD75C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 20-Bit Sigma-Delta Stereo ADA Circuit |
| 中文描述： | 20位Σ-Δ立體聲電路反傾銷協(xié)定 |
| 文件頁數(shù)： | 12/43頁 |
| 文件大?。?/td> | 211K |
| 代理商： | TLC320AD75C |
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1–6
Terminal Functions (Continued)
TERMINAL
NAME
I/O
DESCRIPTION
NO.
ááááááááááááááááááááááááááá
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7, 8,
49, 50
is pulled high. M_S is connected to VSS1 for slave mode.
NU
–
Not used
PVDDL
PVDDR
PVSSL
PVSSR
40
PWM power supply for left channel DAC
31
PWM power supply for right channel DAC
38
PWM ground for left channel DAC
33
PWM ground for right channel DAC
REFI
3
I
Input reference voltage. REFI provides reference voltage for the ADC modulator
(normally connected to REFO).
REFO
54
O
Internal ADC reference voltage (normally connected to REFI).
R1
30
O
Right channel DAC PWM output 1
R2
32
O
Right channel DAC PWM output 2
SCLKA
11
I/O
Shift clock for the ADC. The shift clock clocks serial data out of the ADC, and operates
at 64 times the sample rate (i.e. 64 times LRCKA). SCLKA is normally connected to
SCLKD. SCLKA is output when configured in master mode.
SCLKD
26
I
Shift clock for the DAC. The shift clock clocks serial audio data into the DAC, and
operates at 64 times the sample rate (i.e. 64 times LRCKD). SCLKD is normally
connected to SCLKA.
SHIFT
20
I
Shift data. SHIFT clocks the control data (CDIN) into the internal control registers for
the DAC.
TEST1
9
I
Factory test terminal1. TEST1 should be connected to VSS1 for normal operation.
Factory test terminal2. TEST2 should be connected to VSS1 for normal operation.
Oscillator input terminal for 512 times the DAC sample rate. XIN derives all of the key
logic signals of the DAC device. (XIN can also be driven by an external oscillator.)
TEST2
46
I
XIN
36
I
XOUT
35
O
Oscillator output terminal for 512 times the DAC sample rate
VDD1
VDD2
VSS1
VSS1B
VSS2
VSS2B
V35A
V35D
XVDD
XVSS
43, 44
Digital power supply for ADC
29, 42
Digital power supply voltage for DAC
45
Digital ground for ADC digital flters
14, 48
Digital substrate ground for ADC
24
Digital ground for the DAC
17
Digital sustrate ground for DAC
13
Digital power supply for ADC interface logic. V35A is connected to 3 V or 5 V.
Digital power supply for DAC interface logic. V35D is connected to 3 V or 5 V.
Oscillator power-supply voltage for DAC
23
34
37
Oscillator circuit ground for DAC
256CK
22
O
256 times sample rate clock output. 256CK is normally connected to MCLKI through
a 50-
resistor. 256CK is the XIN frequency divided by two.
512CK
25
O
512 times sample rate clock output (output level is 3.3 V for V35D = 3.3 V). 512CK is
a buffered version of XIN (master clock input).
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| TLC320AD77C | 24-BIT 96 kHz STEREO AUDIO CODEC |
| TLC320AD80C | Audio Processor Subsystem |
| TLC320AD81CDBT | Stereo Audio Digital Equalizer DC |
| TLC320AD81C | Stereo Audio Digital Equalizer DC |
| TLC339CDB | LinCMOSE MICROPOWER QUAD COMPARATORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC320AD75CDL | 制造商:Texas Instruments 功能描述: |
| TLC320AD77 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-Bit 96 kHz Stereo Audio Codec |
| TLC320AD77C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:24-BIT 96 kHz STEREO AUDIO CODEC |
| TLC320AD77CDB | 功能描述:接口—CODEC STEREO AUDIO ADA RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AD77CDBG4 | 功能描述:接口—CODEC STEREO AUDIO ADA RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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