參數(shù)資料
型號: TLC320AD50IDW
廠商: TEXAS INSTRUMENTS INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO28
封裝: PLASTIC, SO-28
文件頁數(shù): 11/56頁
文件大小: 555K
代理商: TLC320AD50IDW
2–4
does not need to be addressed during the secondary communications interval. The no-op command (DS15–DS8 all
set to 0) addresses the pseudoregister (register 0), and no register programming takes place during the
communications.
In addition, each register can be read back through DOUT during secondary communications by setting the read bit
(DS13) to 1. When the register is in the read mode, no data can be written to the register during this cycle. DS13 must
be cleared to write to the register.
For example, if the contents of control register 1 is desired to be read out from DOUT, the following procedure must
be performed through DIN:
1.
Request secondary communication by setting either D0 = 1 (software request) or FC = high (hardware
request) during the primary communication interval.
2.
At the secondary communication interval (FS), send data in the following format in through DIN:
read
control register 1
0
1
0
1
x
DS15
DS0
3.
Then the following data will be read from DOUT, the last 8 bits of DOUT will contain the register 1 data.
read
control register 1
data
M/S
0
1
0
1
d
DS15
DS0
Figure 2–5 is a timing diagram of this procedure.
FS
DIN
P
DOUT
Low 8 Bits (DS0–DS7) are the
Content of Register 1
Register 1 Read
S
Figure 2–5. Register 1 Read Operation Timing Diagram
If control register 1 needs to be programmed, the following procedure must be performed through DIN:
1.
Request secondary communication by setting either D0 = 1 (software request) or FC = high (hardware
request) during the primary communication interval.
2.
At the secondary communication interval (FS), send data in the following format in through DIN:
write
control register 1
data
0
1
d
DS15
DS0
3.
Then the following data is generated from DOUT:
write
control register 1
M/S
0
1
0
DS15
DS0
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