參數(shù)資料
型號(hào)： TH50VSF3583AASB
廠商： Toshiba Corporation
英文描述： TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS
中文描述： 東芝多芯片集成電路硅柵CMOS
文件頁(yè)數(shù)： 30/50頁(yè)
文件大?。?/td> 548K
代理商： TH50VSF3583AASB
TH50VSF3582/3583AASB
2001-06-08 30/50
DQ3 (Block Erase timer)
The Block Erase operation starts 50
μ
s (Erase Hold Time) after the rising edge of WE in the last command
cycle. DQ3 outputs a 0 during the Block Erase Hold Time and a 1 when the Erase operation starts. Additional
Block Erase commands can only be accepted during this Block Erase Hold Time. Each Block Erase command
received within this hold time resets the timer, allowing additional blocks to be marked for erasing. DQ3
outputs a 1 if the Program or Erase operation fails.
DQ2 (Toggle bit 2)
DQ2 is used to detect blocks for Auto Block Erase or to detect whether the device is in Erase Suspend mode.
During Auto Block Erase, if data are continuously read from the selected block, DQ2 output toggles. At this
time 1 is output from non-selected blocks; thus, the selected block can be detected. When the device is in Erase
Suspend mode, if data are continuously read from the selected block for Auto Block Erase, DQ2 output toggles.
At this time, because DQ6 output does not toggle, Erase Suspend mode can be detected. When the device is in
Programming mode during Erase suspend, if data are read from the address to which data are being written,
DQ2 outputs 1.
RY
The TH50VSF3582/3583AASB has a
(Busy state) indicates that an Auto Program or Auto Erase operation is in progress. A 1 (Ready state) indicates
that the operation has finished and that the device can accept a new command. The
when an operation has failed.
The
BY
/
RY
signal outputs a 0 after the rising edge of WE in the last command cycle.
During an Auto Block Erase operation, commands other than Erase Suspend are ignored. The
outputs a 1 during an Erase Suspend operation. The output buffer for the
circuit, allowing a wired
OR connection. A pull-up resistor needs to be inserted between V
CC
and the
pin.
BY
/
RY
signal to indicate the device status to the host processor. A 0
BY
/
RY
signal outputs a 0
BY
/
RY
signal
BY
/
RY
pin is an open drain type
BY
/
RY
BUSY
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