參數(shù)資料
型號(hào): TEA6880
廠商: NXP Semiconductors N.V.
英文描述: ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述: 截至級(jí)車電臺(tái)模擬信號(hào)處理器支持核心計(jì)劃
文件頁(yè)數(shù): 37/88頁(yè)
文件大小: 328K
代理商: TEA6880
2000 May 08
37
Philips Semiconductors
Product specification
Up-level Car radio Analog Signal
Processor (CASP)
TEA6880H
11.3
Subaddress byte for write
Table 11
Format for subaddress byte
Table 12
Description of subaddress byte
Table 13
Selection of data byte
Note
1.
Not tested; function not guaranteed.
7
6
5
4
3
2
1
0
AIOF
BOUT
SAD3
SAD2
SAD1
SAD0
BIT
SYMBOL
DESCRIPTION
7
AIOF
Auto-increment control.
This bit controls the auto-increment function. If AIOF = 0, then
the auto-increment is on. If AIOF = 1, then auto-increment is off.
I
2
C-bus output control.
This bit enables/disables the I
2
C-bus output SDAQ and SCLQ
to the TEA6840H. If BOUT = 0, then the I
2
C-bus output is disabled. If BOUT = 1, then
the I
2
C-bus output is enabled.
These 2 bits are not used; both must be set to logic 0.
6
BOUT
5
4
3
2
1
0
SAD3
SAD2
SAD1
SAD0
Data byte select.
These 4 bits select which data byte is to be addressed; see Table 13.
ADDRESSED DATA BYTE
MNEMONIC
SAD3
SAD2
SAD1
SAD0
Alignment 0
Alignment 1
Alignment 2
Alignment 3
ASI time source selector
Bass control
Treble control
Loudness control
Volume 1
Volume 2, left front
Volume 2, right front
Volume 2, left rear
Volume 2, right rear
Not used
(1)
Not used
(1)
Not used
(1)
ALGN0
ALGN1
ALGN2
ALGN3
SSEL
BASS
TRBL
LOUD
VOLU1
VOL2_LF
VOL2_RF
VOL2_LR
VOL2_RR
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
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