參數(shù)資料
型號(hào): TDA9884TS
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: I2C-bus controlled multistandard alignment-free IF-PLL for mobile reception
中文描述: AM/FM, AUDIO/VIDEO DEMODULATOR, PDSO24
封裝: 5.30 MM, PLASTIC, SOT-340-1, MO-150, SSOP-24
文件頁(yè)數(shù): 15/55頁(yè)
文件大?。?/td> 231K
代理商: TDA9884TS
2003 Nov 28
15
Philips Semiconductors
Product specification
I
2
C-bus controlled multistandard alignment-free
IF-PLL for mobile reception
TDA9884TS
Table 7
Automatic frequency control bits; note 1
Note
1.
f
0
is the nominal frequency of f
VIF
.
8.2
Write format
Table 8
I
2
C-bus write format (slave receives data); note 1
Note
1.
The auto-increment of the subaddress stops if the subaddress is 3.
Table 9
Explanation of Table 8
BIT
f
VIF
AFC4
AFC3
AFC2
AFC1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
(f
0
187.5 kHz)
f
0
162.5 kHz
f
0
137.5 kHz
f
0
112.5 kHz
f
0
87.5 kHz
f
0
62.5 kHz
f
0
37.5 kHz
f
0
12.5 kHz
f
0
+ 12.5 kHz
f
0
+ 37.5 kHz
f
0
+ 62.5 kHz
f
0
+ 87.5 kHz
f
0
+ 112.5 kHz
f
0
+ 137.5 kHz
f
0
+ 162.5 kHz
(f
0
+ 187.5 kHz)
S
BYTE 1
A
BYTE 2
A
BYTE 3
A
BYTE n
A
P
A6 to A0
slave address
R/W
0
A7 to A0
subaddress
bits 7 to 0
data 1
bits 7 to 0
data n
SYMBOL
FUNCTION
S
Slave address
R/W = 0
A
Subaddress (SAD)
Data 1, data n
P
START condition, generated by the master
see Table 4
write command, generated by the master
acknowledge bit, generated by the slave
see Table 10
8-bit data words, transmitted by the master (see Tables 11, 12 and 14)
STOP condition
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