參數(shù)資料
型號(hào)： TDA9605H
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Audio processor with head amplifier for VHS hi-fi
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
文件頁(yè)數(shù)： 31/52頁(yè)
文件大小： 244K
代理商： TDA9605H
1999 Apr 14
31
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
7.10.3
C
ALIBRATION ERROR
An unreliable calibration result is indicated when reading
bit CALE = 1. The calibration result is not reliable when
during calibration the control signal on pin RMHID is
disturbed due to an external cause. Such a disturbance of
the HID control signal is detected when reading
bit CALE = 1. A new calibration should be started to
ensure proper calibration.
Calibration is found correct when bit CALR = 1 and
bit CALE = 0.
Table 37
Calibration error (bit CALE)
Note
1.
Power-on reset state.
7.10.4
P
OWER
-
ON RESET
An internal Power-on reset signal is generated at
power-up or during a power voltage dip. The I
2
C-bus data
bits and auto-calibration registers are reset to a
pre-defined state. When reading bit POR = 1, it indicates
that the internal data bits are found to be in the POR state
due to an actual Power-on reset or the I
2
C-bus control
settings.
CALE
DESCRIPTION
0
not calibrated or calibration result is found
correct; note 1
calibration error encountered during calibration
1
Detecting the occurrence of a Power-on reset by reading
bit POR requires a setting of bit PORR = 1 after power-up.
Bit POR is forced to logic 0 only by setting bit PORR = 1,
so this setting is independent of other I
2
C-bus bit settings.
After calibration a Power-on reset occurrence is also
indicated by bit CALR = 0, because calibration will be lost.
Table 38
Power-on reset (bit POR)
Note
1.
Power-on reset state.
POR
DESCRIPTION
0
I
2
C-bus bit state differs from the Power-on reset
state
I
2
C-bus bit state equals the Power-on reset
state; note 1
1
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