參數(shù)資料
型號: TDA9112A
廠商: 意法半導(dǎo)體
英文描述: HIGH-END I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
中文描述: 高端的I2C可控?fù)隙榷嗤斤@示器處理器
文件頁數(shù): 18/60頁
文件大?。?/td> 781K
代理商: TDA9112A
TDA9112A
18/60
Notes about dynamic output section
Note 45:
HVDC-VAMP
at minimum
.
Note 46:
HVDC-HPH
at medium
.
Note 47:
Ratio of the amplitude at
HDyCorTr
=1 to the amplitude at
HDyCorTr
=0 (refer to chapter "I2C-bus control
register map") as a quadratic function of horizontal size adjustment.
Note 48:
(1.38)
SHVDC-HSHAP
Note 49:
Ratio "A/B"of vertical parabola component voltage at t
VR
=0 versus vertical parabola component voltage at
t
VR
=T
VR
.
Note 50:
Refer to
Figure 16
.
Note 51:
Taken for reference at given position of
HDyCorPh
flag.
Note 52:
Unsigned value. Polarity selection by
VDyCorPol
I2C-bus bit. Refer to section I2C-bus control register map.
Note 53:
Value gives the shape characteristics of the H-component. Refer to
Figure 17
.
Note 54:
The flat part begins at the start of fly-back and ends at the same moment as for combination
HDCFlatEn
= 0,
HDyCorPh
= 1. Refer to
Figure 16
.
Tracking of V-parabola component
of the drive signal on
HVDyCor
out-
put with vertical position
(
49
)
HVDC-VAMP
at max.:
VPOS
(Sad08h):
x0000000b
x1111111b
0.5
2.0
Vertical Dynamic Correction output
VDyCor
I
VDyCor
Current delivered by
VDyCor
output
DC component of the drive signal
on
VDyCor
output
-1.5
0.1
mA
V
VD-DC
R
L(VDyCor)
=10k
4
V
V
VD-V
Amplitude of V-parabola on
VDyCor
output
(
52
)
(
28
)
VSIZE
at medium
VDC-AMP
(Sad15h):
x0000000b
x1000000b
x1111111b
VDC-AMP
at maximum
VSIZE
(Sad07h):
x0000000b
x1111111b
VDC-AMP
at maximum
VPOS
(Sad08h):
x0000000b
x1111111b
0
0.5
1
0.6
1.6
V
V
V
V
V
Tracking of V-parabola on
VDyCor
output with vertical position
(
49
)
0.5
2.0
Table 4. Dynamic correction outputs section (
V
CC
= 12V, T
amb
= 25°C)
Symbol
Parameter
Test Conditions
Value
Typ.
Units
Min.
Max.
HVD V
t
VR
0
t
VR
T
VR
=
=
[
]
[
]
-------HVD V
VD V
t
VR
0
=
t
VR
T
VR
=
[
]
[
]
-------VD V
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