參數(shù)資料
型號： T90FJR
廠商： ATMEL CORP
元件分類： 消費家電
英文描述： Dual Common Interface Hardware Controller- CIMax
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP128
封裝： PLASTIC, QFP-128
文件頁數(shù)： 17/41頁
文件大?。?/td> 617K
代理商： T90FJR
17
T90FJR
Rev. A
–
7-Sep-01
Hot plug and bypass
As a module can be inserted or removed at any time, in order not to break the daisy
chain, the CIMaX
handles one MPEG transport stream bypass for each module. This
bypass is enabled as long as a valid DVB CI module is not recognized to be inserted
and activated in the corresponding slot or automatically as soon as the module is
removed from a slot. The disabling of the bypass is controlled by the TSOEN bit in each
Module Control Register. The bypass can be switched at any time, regardless of the
MPEG stream synchronization.
TS swap (SCM Patent
Pending)
With standard conditional access modules, the order in which the transport stream
passes through has no influence. However, in some particular cases, it can be useful to
choose which module is first in the TS daisy chain. The TSWAP bit in the Destination
Select Register when set, virtually swaps the two modules so that the MPEG stream
passes first in the B module and then in the A module.
TS / Addresses input signals
The MPEG input stream pins on the module are shared with the high order addresses
specified by the PC Card standard. When a module is inserted, before initialization, all
these pins are forced to logical 0 state. If a memory module is recognized, the high order
addresses A[25..15] can be applied to the module by setting the HAD bit in the Module
Control Register. If a DVB module is recognized, the MPEG stream is applied to the
module by setting the TSIEN bit in the Module Control Register. Those two bits cannot
be set at the same time and are reset when the module is extracted
When HAD is set, the maximum propagation delay between A[25..15] inputs and TS
outputs to the modules is 25 ns with a load of 50 pF on the outputs.
The TSOEN bit (TS bypass control bit) can only be set when TSIEN has previously been
set.
Resetting TSIEN also resets TSOEN.
Invert mask
Some modules can output an MPEG stream with inverted bits in the MPEG data bus.
The CIMaX
is able to re-invert those bits to restore the correct data on the bus. This is
achieved by setting the appropriate bits in the Invert Mask Register.
IO characteristics
The CIMaX
ensures that the MPEG stream output signals applied to the modules and
to the MPEG decoder (or chained CIMaX
) meets the AC and DC electrical character-
istics defined in the PC Card standard [1], the DVB CI standard [2] and Guidelines for
implementation [3]. Moreover, the CIMaX
MPEG inputs from MPEG source
(e.g. front-end receiver) and from the modules comply with the same requirements. In
order to fulfil the timing requirements, the MPEG stream is re-synchronized at each step
2:1 mux
TS in TS out
Module #i
Control
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