DMAxSTA: DMA CHANNEL x RAM START ADDRESS REGISTE" />
參數(shù)資料
型號: T89C51CC01UA-RLTIM
廠商: Atmel
文件頁數(shù): 51/123頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 32K 44VQFP
標準包裝: 160
系列: AT89C CAN
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 托盤
配用: AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名稱: T89C51CC01UARLTIM
dsPIC33F
DS70165E-page 142
Preliminary
2007 Microchip Technology Inc.
REGISTER 7-3:
DMAxSTA: DMA CHANNEL x RAM START ADDRESS REGISTER A(1)
R/W-0
STA<15:8>
bit 15
bit 8
R/W-0
STA<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
STA<15:0>: Primary DMA RAM Start Address bits (source or destination)
Note 1:
A read of this address register will return the current contents of the DMA RAM Address register, not the
contents written to STA<15:0>. If the channel is enabled (i.e., active), writes to this register may result in
unpredictable behavior of the DMA channel and should be avoided.
REGISTER 7-4:
DMAxSTB: DMA CHANNEL x RAM START ADDRESS REGISTER B(1)
R/W-0
STB<15:8>
bit 15
bit 8
R/W-0
STB<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
STB<15:0>: Secondary DMA RAM Start Address bits (source or destination)
Note 1:
A read of this address register will return the current contents of the DMA RAM Address register, not the
contents written to STB<15:0>. If the channel is enabled (i.e., active), writes to this register may result in
unpredictable behavior of the DMA channel and should be avoided.
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