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參數(shù)資料
| 型號： | T71L6808A |
| 廠商： | TM Technology, Inc. |
| 英文描述： | Octal 10/100 Switch with Embedded Memory |
| 中文描述： | 八路10/100交換機嵌入式存儲器 |
| 文件頁數(shù)： | 9/23頁 |
| 文件大小： | 335K |
| 代理商： | T71L6808A |
TE
CH
tm
restart the auto-negotiation process through MDIO using PHY address increasingly from 01000b to
01111b. After restarting auto-negotiation, the T71L6808A will continuously poll the link status and
link partner's ability which including speed, duplex and flow control of the PHY devices via MDIO.
The following is the management frame format :
Preliminary T71L6808A
Taiwan Memory Technology, Inc. reserves the right
P. 9
to change products or specifications without notice.
Publication Date:May. 2001
Revision:0.A
Operation PRE
ST
OP
PHYAD
REGAD
TA DATA
IDLE
Read
Write
1…1 01
1…1 01
10
01
AAAAA RRRRR
AAAAA RRRRR
Z0 DDDDDDDDDDDDDDDD Z
10 DDDDDDDDDDDDDDDD Z
24LC02 Interface
The 24LC02 interface is a 2-wire serial EEPROM interface providing 2K bits storage space. After
power on reset, the T71L6808A uses Random Read and Sequential Read commands to auto-load
configuration settings, pause frame source address and so on. After auto-loaded, the 24LC02
interface pins SCL and SDA are tri-stated for on-line updating 24LC02 contents through a parallel
port.
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