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參數(shù)資料
| 型號(hào)： | T6817-TKS |
| 廠商： | ATMEL CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Dual Triple DMOS Output Driver with Serial Input Control |
| 中文描述： | BRUSH DC MOTOR CONTROLLER, 10 A, PDSO20 |
| 封裝： | POWER, SSOP-20 |
| 文件頁(yè)數(shù)： | 8/15頁(yè) |
| 文件大?。?/td> | 184K |
| 代理商： | T6817-TKS |
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8
T6817
4670A–BCD–02/03
Note:
1. Test pulse 5: V
Smax
= 40 V
Noise and Surge Immunity
Parameter
Test Conditions
Value
Level 4
1)
Conducted interferences
ISO 7637–1
Interference Suppression
VDE 0879 Part 2
Level 5
ESD (Human Body Model)
MIL-STM 5.1 – 1998
2 kV
ESD (Machine Model)
JEDEC EIA / JESD 22 – A115-A
150 V
Electrical Characteristics
7.5 V < V
VS
< V
OV
; 4.5 V < V
VCC
< 5.5 V; INH = High; -40°C < T
j
< 150°C; unless otherwise specified,
all values refer to GND pins.
No.
Parameters
Test Conditions
1
Current Consumption
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
1.1
Quiescent current
(VS)
V
VS
16 V, INH or
bit SI = lo
6, 7
I
VS
40
A
A
1.2
Quiescent current
(VCC)
4.5 V
<
V
VCC
<
5.5 V,
INH or bit SI = low
V
VS
<
16 V normal
operating, all output
stages off,
19
I
VCC
20
A
A
1.3
Supply current (VS)
6, 7
I
VS
0.8
1.2
mA
A
1.4
Supply current (VS)
V
VS
<
16 V normal
operating, all output
stages on, no load
6, 7
I
VS
10
mA
A
1.5
Supply current (VCC)
4.5 V
<
V
VCC
< 5.5 V,
normal operating Pin
19
I
VCC
150
A
A
2
Internal Oscillator Frequency
2.1
Frequency (time base
for delay timers)
Over- and Undervoltage Detection, Power-on Reset
f
OSC
19
45
kHz
A
3
3.1
Power-on reset
threshold
19
V
VCC
3.4
3.9
4.4
V
A
3.2
Power-on reset delay
time
After switching on
V
VCC
19
t
dPor
30
95
160
s
A
3.3
Undervoltage
detection threshold
6, 7
V
UV
5.5
7.0
V
A
3.4
Undervoltage
detection hysteresis
6, 7
V
UV
0.4
V
A
3.6
Undervoltage
detection delay
6, 7
t
dUV
7
21
ms
A
3.7
Overvoltage detection
threshold
6, 7
V
OV
18.0
22.5
V
A
38
Overvoltage detection
hysteresis
6, 7
V
OV
1
V
A
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1. Delay time between rising edge of CS after data transmission and switch on/off output stages to 90% of final level
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