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參數(shù)資料
| 型號： | T6817-TKS |
| 廠商： | ATMEL CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Dual Triple DMOS Output Driver with Serial Input Control |
| 中文描述： | BRUSH DC MOTOR CONTROLLER, 10 A, PDSO20 |
| 封裝： | POWER, SSOP-20 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 184K |
| 代理商： | T6817-TKS |
11
T6817
4670A–BCD–02/03
Serial Interface – Timing
8
Serial Interface - Logic Output DO
8.1
Output voltage low
level
I
OL
= 3 mA
18
V
DOL
0.5
V
A
8.2
Output voltage high
level
I
OL
= -2 mA
18
V
DOH
V
VCC
-
1 V
V
A
8.3
Leakage current
(tri-state)
V
CS
= V
VCC,
0 V
<
V
DO
<
V
VCC
18
I
DO
-10
10
A
A
Electrical Characteristics (Continued)
7.5 V < V
VS
< V
OV
; 4.5 V < V
VCC
< 5.5 V; INH = High; -40°C < T
j
< 150°C; unless otherwise specified,
all values refer to GND pins.
No.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1. Delay time between rising edge of CS after data transmission and switch on/off output stages to 90% of final level
Parameters
Test Conditions
Timing
Chart No.
Symbol
Min.
Typ.
Max.
Unit
DO enable after CS falling edge
C
DO
= 100 pF
1
t
ENDO
200
ns
DO disable after CS rising edge
C
DO
= 100 pF
2
t
DISDO
200
ns
DO fall time
C
DO
= 100 pF
-
t
DOf
100
ns
DO rise time
C
DO
= 100 pF
-
t
DOr
100
ns
DO valid time
C
DO
= 100 pF
10
t
DOVal
200
ns
CS setup time
4
t
CSSethl
225
ns
CS setup time
8
t
CSSetlh
225
ns
CS high time
Input register Bit 14
(SCT) = high
9
t
CSh
140
ms
CS high time
Input register Bit 14
(SCT) = low
9
t
CSh
17.5
ms
CLK high time
5
t
CLKh
225
ns
CLK low time
6
t
CLKl
225
ns
CLK period time
-
t
CLKp
500
ns
CLK setup time
7
t
CLKSethl
225
ns
CLK setup time
3
t
CLKSetlh
225
ns
DI setup time
11
t
DIset
40
ns
DI hold time
12
t
DIHold
40
ns
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| T6817-TKSY | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Dual Triple DMOS Output Driver with Serial Input Control |
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