參數(shù)資料
型號(hào): T6817-TKS
廠商: ATMEL CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Dual Triple DMOS Output Driver with Serial Input Control
中文描述: BRUSH DC MOTOR CONTROLLER, 10 A, PDSO20
封裝: POWER, SSOP-20
文件頁(yè)數(shù): 3/15頁(yè)
文件大?。?/td> 184K
代理商: T6817-TKS
3
T6817
4670A–BCD–02/03
Pin Configuration
Figure 2.
Pinning SSO20
GND
DI
CS
CLK
INH
VS
VS
LS3
n.c.
GND
GND
VCC
DO
LS1
HS1
LS2
HS2
GND
HS3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Pin Description
Pin
Symbol
Function
1
GND
Ground; reference potential; internal connection to Pin 10, 11, 13 and 20; cooling tab
2
DI
Serial data input; 5-V CMOS logic level input with internal pull-down; receives serial data from the control
device, DI expects a 16-bit control word with LSB being transferred first
3
CS
Chip-select input; 5-V CMOS logic level input with internal pull-up;
low = serial communication is enabled, high = disabled
4
CLK
Serial clock input; 5-V CMOS logic level input with internal pull down;
controls serial data input interface and internal shift register (f
max
= 2 MHz)
Inhibit input; 5-V logic input with internal pull-down; low = standby,
high = normal operating
5
INH
6, 7
VS
Power supply output stages HS1, HS2 and HS3
8
LS3
Low-side driver output 3; power-MOS open drain with internal reverse diode: overvoltage protection by
active zenering; short-circuit protection; diagnosis for short and open load
9
n.c.
Not connected
10
GND
Ground (see Pin 1) be consistant
11
GND
Ground (see Pin 1)
12
HS3
High-side driver output 3; power-MOS open drain with internal reverse diode: overvoltage protection by
active zenering; short-circuit protection; diagnosis for short and open load
13
GND
Ground (see Pin 1)
14
HS2
High-side driver output 2 (see Pin 12) be consistant
15
LS2
Low-side driver output 2 (see Pin 8)
16
HS1
High-side driver output 1 (see Pin 12)
17
LS1
Low-side driver output 1 (see Pin 8)
18
DO
Serial data output; 5-V CMOS logic level tri-state output for output (status) register data; sends 16-bit
status information to the microcontroller (LSB is transferred first); output will remain tri-stated unless
device is selected by CS = low, therefore, several ICs can operate on only one data output line only.
19
VCC
Logic supply voltage (5 V)
20
GND
Ground (see Pin 1)
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